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Issue 998283002: [turbofan] Introduce optional Float64Min and Float64Max machine operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/scopes.h" 10 #include "src/scopes.h"
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734 __ popfq(); 734 __ popfq();
735 } 735 }
736 __ j(parity_even, &mod_loop); 736 __ j(parity_even, &mod_loop);
737 // Move output to stack and clean up. 737 // Move output to stack and clean up.
738 __ fstp(1); 738 __ fstp(1);
739 __ fstp_d(Operand(rsp, 0)); 739 __ fstp_d(Operand(rsp, 0));
740 __ movsd(i.OutputDoubleRegister(), Operand(rsp, 0)); 740 __ movsd(i.OutputDoubleRegister(), Operand(rsp, 0));
741 __ addq(rsp, Immediate(kDoubleSize)); 741 __ addq(rsp, Immediate(kDoubleSize));
742 break; 742 break;
743 } 743 }
744 case kSSEFloat64Max:
745 ASSEMBLE_DOUBLE_BINOP(maxsd);
746 break;
747 case kSSEFloat64Min:
748 ASSEMBLE_DOUBLE_BINOP(minsd);
749 break;
744 case kSSEFloat64Sqrt: 750 case kSSEFloat64Sqrt:
745 if (instr->InputAt(0)->IsDoubleRegister()) { 751 if (instr->InputAt(0)->IsDoubleRegister()) {
746 __ sqrtsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); 752 __ sqrtsd(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
747 } else { 753 } else {
748 __ sqrtsd(i.OutputDoubleRegister(), i.InputOperand(0)); 754 __ sqrtsd(i.OutputDoubleRegister(), i.InputOperand(0));
749 } 755 }
750 break; 756 break;
751 case kSSEFloat64Round: { 757 case kSSEFloat64Round: {
752 CpuFeatureScope sse_scope(masm(), SSE4_1); 758 CpuFeatureScope sse_scope(masm(), SSE4_1);
753 RoundingMode const mode = 759 RoundingMode const mode =
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840 break; 846 break;
841 case kAVXFloat64Sub: 847 case kAVXFloat64Sub:
842 ASSEMBLE_AVX_DOUBLE_BINOP(vsubsd); 848 ASSEMBLE_AVX_DOUBLE_BINOP(vsubsd);
843 break; 849 break;
844 case kAVXFloat64Mul: 850 case kAVXFloat64Mul:
845 ASSEMBLE_AVX_DOUBLE_BINOP(vmulsd); 851 ASSEMBLE_AVX_DOUBLE_BINOP(vmulsd);
846 break; 852 break;
847 case kAVXFloat64Div: 853 case kAVXFloat64Div:
848 ASSEMBLE_AVX_DOUBLE_BINOP(vdivsd); 854 ASSEMBLE_AVX_DOUBLE_BINOP(vdivsd);
849 break; 855 break;
856 case kAVXFloat64Max:
857 ASSEMBLE_AVX_DOUBLE_BINOP(vmaxsd);
858 break;
859 case kAVXFloat64Min:
860 ASSEMBLE_AVX_DOUBLE_BINOP(vminsd);
861 break;
850 case kX64Movsxbl: 862 case kX64Movsxbl:
851 ASSEMBLE_MOVX(movsxbl); 863 ASSEMBLE_MOVX(movsxbl);
852 __ AssertZeroExtended(i.OutputRegister()); 864 __ AssertZeroExtended(i.OutputRegister());
853 break; 865 break;
854 case kX64Movzxbl: 866 case kX64Movzxbl:
855 ASSEMBLE_MOVX(movzxbl); 867 ASSEMBLE_MOVX(movzxbl);
856 __ AssertZeroExtended(i.OutputRegister()); 868 __ AssertZeroExtended(i.OutputRegister());
857 break; 869 break;
858 case kX64Movb: { 870 case kX64Movb: {
859 size_t index = 0; 871 size_t index = 0;
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1481 } 1493 }
1482 } 1494 }
1483 MarkLazyDeoptSite(); 1495 MarkLazyDeoptSite();
1484 } 1496 }
1485 1497
1486 #undef __ 1498 #undef __
1487 1499
1488 } // namespace internal 1500 } // namespace internal
1489 } // namespace compiler 1501 } // namespace compiler
1490 } // namespace v8 1502 } // namespace v8
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