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Side by Side Diff: src/compiler/ia32/instruction-codes-ia32.h

Issue 998283002: [turbofan] Introduce optional Float64Min and Float64Max machine operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 18 matching lines...) Expand all
29 V(IA32Shl) \ 29 V(IA32Shl) \
30 V(IA32Shr) \ 30 V(IA32Shr) \
31 V(IA32Sar) \ 31 V(IA32Sar) \
32 V(IA32Ror) \ 32 V(IA32Ror) \
33 V(SSEFloat64Cmp) \ 33 V(SSEFloat64Cmp) \
34 V(SSEFloat64Add) \ 34 V(SSEFloat64Add) \
35 V(SSEFloat64Sub) \ 35 V(SSEFloat64Sub) \
36 V(SSEFloat64Mul) \ 36 V(SSEFloat64Mul) \
37 V(SSEFloat64Div) \ 37 V(SSEFloat64Div) \
38 V(SSEFloat64Mod) \ 38 V(SSEFloat64Mod) \
39 V(SSEFloat64Max) \
40 V(SSEFloat64Min) \
39 V(SSEFloat64Sqrt) \ 41 V(SSEFloat64Sqrt) \
40 V(SSEFloat64Round) \ 42 V(SSEFloat64Round) \
41 V(SSECvtss2sd) \ 43 V(SSECvtss2sd) \
42 V(SSECvtsd2ss) \ 44 V(SSECvtsd2ss) \
43 V(SSEFloat64ToInt32) \ 45 V(SSEFloat64ToInt32) \
44 V(SSEFloat64ToUint32) \ 46 V(SSEFloat64ToUint32) \
45 V(SSEInt32ToFloat64) \ 47 V(SSEInt32ToFloat64) \
46 V(SSEUint32ToFloat64) \ 48 V(SSEUint32ToFloat64) \
47 V(SSEFloat64ExtractLowWord32) \ 49 V(SSEFloat64ExtractLowWord32) \
48 V(SSEFloat64ExtractHighWord32) \ 50 V(SSEFloat64ExtractHighWord32) \
49 V(SSEFloat64InsertLowWord32) \ 51 V(SSEFloat64InsertLowWord32) \
50 V(SSEFloat64InsertHighWord32) \ 52 V(SSEFloat64InsertHighWord32) \
51 V(SSEFloat64LoadLowWord32) \ 53 V(SSEFloat64LoadLowWord32) \
52 V(AVXFloat64Add) \ 54 V(AVXFloat64Add) \
53 V(AVXFloat64Sub) \ 55 V(AVXFloat64Sub) \
54 V(AVXFloat64Mul) \ 56 V(AVXFloat64Mul) \
55 V(AVXFloat64Div) \ 57 V(AVXFloat64Div) \
58 V(AVXFloat64Max) \
59 V(AVXFloat64Min) \
56 V(IA32Movsxbl) \ 60 V(IA32Movsxbl) \
57 V(IA32Movzxbl) \ 61 V(IA32Movzxbl) \
58 V(IA32Movb) \ 62 V(IA32Movb) \
59 V(IA32Movsxwl) \ 63 V(IA32Movsxwl) \
60 V(IA32Movzxwl) \ 64 V(IA32Movzxwl) \
61 V(IA32Movw) \ 65 V(IA32Movw) \
62 V(IA32Movl) \ 66 V(IA32Movl) \
63 V(IA32Movss) \ 67 V(IA32Movss) \
64 V(IA32Movsd) \ 68 V(IA32Movsd) \
65 V(IA32Lea) \ 69 V(IA32Lea) \
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after
99 V(M2I) /* [ %r2*2 + K] */ \ 103 V(M2I) /* [ %r2*2 + K] */ \
100 V(M4I) /* [ %r2*4 + K] */ \ 104 V(M4I) /* [ %r2*4 + K] */ \
101 V(M8I) /* [ %r2*8 + K] */ \ 105 V(M8I) /* [ %r2*8 + K] */ \
102 V(MI) /* [ K] */ 106 V(MI) /* [ K] */
103 107
104 } // namespace compiler 108 } // namespace compiler
105 } // namespace internal 109 } // namespace internal
106 } // namespace v8 110 } // namespace v8
107 111
108 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 112 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
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