| Index: source/libvpx/third_party/libyuv/source/convert_from.cc
|
| diff --git a/source/libvpx/third_party/libyuv/source/convert_from.cc b/source/libvpx/third_party/libyuv/source/convert_from.cc
|
| index c1a2f62f02022cb27c1c0b14a5a2f8d2bd934d71..b743cde264bd7e0b42f7906d631651389a3265be 100644
|
| --- a/source/libvpx/third_party/libyuv/source/convert_from.cc
|
| +++ b/source/libvpx/third_party/libyuv/source/convert_from.cc
|
| @@ -13,7 +13,6 @@
|
| #include "libyuv/basic_types.h"
|
| #include "libyuv/convert.h" // For I420Copy
|
| #include "libyuv/cpu_id.h"
|
| -#include "libyuv/format_conversion.h"
|
| #include "libyuv/planar_functions.h"
|
| #include "libyuv/rotate.h"
|
| #include "libyuv/scale.h" // For ScalePlane()
|
| @@ -174,14 +173,15 @@ int I422ToYUY2(const uint8* src_y, int src_stride_y,
|
| src_stride_y = src_stride_u = src_stride_v = dst_stride_yuy2 = 0;
|
| }
|
| #if defined(HAS_I422TOYUY2ROW_SSE2)
|
| - if (TestCpuFlag(kCpuHasSSE2) && width >= 16) {
|
| + if (TestCpuFlag(kCpuHasSSE2)) {
|
| I422ToYUY2Row = I422ToYUY2Row_Any_SSE2;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToYUY2Row = I422ToYUY2Row_SSE2;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOYUY2ROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 16) {
|
| +#endif
|
| +#if defined(HAS_I422TOYUY2ROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToYUY2Row = I422ToYUY2Row_Any_NEON;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToYUY2Row = I422ToYUY2Row_NEON;
|
| @@ -220,14 +220,15 @@ int I420ToYUY2(const uint8* src_y, int src_stride_y,
|
| dst_stride_yuy2 = -dst_stride_yuy2;
|
| }
|
| #if defined(HAS_I422TOYUY2ROW_SSE2)
|
| - if (TestCpuFlag(kCpuHasSSE2) && width >= 16) {
|
| + if (TestCpuFlag(kCpuHasSSE2)) {
|
| I422ToYUY2Row = I422ToYUY2Row_Any_SSE2;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToYUY2Row = I422ToYUY2Row_SSE2;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOYUY2ROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 16) {
|
| +#endif
|
| +#if defined(HAS_I422TOYUY2ROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToYUY2Row = I422ToYUY2Row_Any_NEON;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToYUY2Row = I422ToYUY2Row_NEON;
|
| @@ -280,14 +281,15 @@ int I422ToUYVY(const uint8* src_y, int src_stride_y,
|
| src_stride_y = src_stride_u = src_stride_v = dst_stride_uyvy = 0;
|
| }
|
| #if defined(HAS_I422TOUYVYROW_SSE2)
|
| - if (TestCpuFlag(kCpuHasSSE2) && width >= 16) {
|
| + if (TestCpuFlag(kCpuHasSSE2)) {
|
| I422ToUYVYRow = I422ToUYVYRow_Any_SSE2;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToUYVYRow = I422ToUYVYRow_SSE2;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOUYVYROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 16) {
|
| +#endif
|
| +#if defined(HAS_I422TOUYVYROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToUYVYRow = I422ToUYVYRow_Any_NEON;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToUYVYRow = I422ToUYVYRow_NEON;
|
| @@ -326,14 +328,15 @@ int I420ToUYVY(const uint8* src_y, int src_stride_y,
|
| dst_stride_uyvy = -dst_stride_uyvy;
|
| }
|
| #if defined(HAS_I422TOUYVYROW_SSE2)
|
| - if (TestCpuFlag(kCpuHasSSE2) && width >= 16) {
|
| + if (TestCpuFlag(kCpuHasSSE2)) {
|
| I422ToUYVYRow = I422ToUYVYRow_Any_SSE2;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToUYVYRow = I422ToUYVYRow_SSE2;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOUYVYROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 16) {
|
| +#endif
|
| +#if defined(HAS_I422TOUYVYROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToUYVYRow = I422ToUYVYRow_Any_NEON;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToUYVYRow = I422ToUYVYRow_NEON;
|
| @@ -397,20 +400,15 @@ int I420ToNV12(const uint8* src_y, int src_stride_y,
|
| src_stride_u = src_stride_v = dst_stride_uv = 0;
|
| }
|
| #if defined(HAS_MERGEUVROW_SSE2)
|
| - if (TestCpuFlag(kCpuHasSSE2) && halfwidth >= 16) {
|
| + if (TestCpuFlag(kCpuHasSSE2)) {
|
| MergeUVRow_ = MergeUVRow_Any_SSE2;
|
| if (IS_ALIGNED(halfwidth, 16)) {
|
| - MergeUVRow_ = MergeUVRow_Unaligned_SSE2;
|
| - if (IS_ALIGNED(src_u, 16) && IS_ALIGNED(src_stride_u, 16) &&
|
| - IS_ALIGNED(src_v, 16) && IS_ALIGNED(src_stride_v, 16) &&
|
| - IS_ALIGNED(dst_uv, 16) && IS_ALIGNED(dst_stride_uv, 16)) {
|
| - MergeUVRow_ = MergeUVRow_SSE2;
|
| - }
|
| + MergeUVRow_ = MergeUVRow_SSE2;
|
| }
|
| }
|
| #endif
|
| #if defined(HAS_MERGEUVROW_AVX2)
|
| - if (TestCpuFlag(kCpuHasAVX2) && halfwidth >= 32) {
|
| + if (TestCpuFlag(kCpuHasAVX2)) {
|
| MergeUVRow_ = MergeUVRow_Any_AVX2;
|
| if (IS_ALIGNED(halfwidth, 32)) {
|
| MergeUVRow_ = MergeUVRow_AVX2;
|
| @@ -418,7 +416,7 @@ int I420ToNV12(const uint8* src_y, int src_stride_y,
|
| }
|
| #endif
|
| #if defined(HAS_MERGEUVROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && halfwidth >= 16) {
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| MergeUVRow_ = MergeUVRow_Any_NEON;
|
| if (IS_ALIGNED(halfwidth, 16)) {
|
| MergeUVRow_ = MergeUVRow_NEON;
|
| @@ -476,18 +474,15 @@ int I420ToARGB(const uint8* src_y, int src_stride_y,
|
| dst_stride_argb = -dst_stride_argb;
|
| }
|
| #if defined(HAS_I422TOARGBROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToARGBRow = I422ToARGBRow_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| - I422ToARGBRow = I422ToARGBRow_Unaligned_SSSE3;
|
| - if (IS_ALIGNED(dst_argb, 16) && IS_ALIGNED(dst_stride_argb, 16)) {
|
| - I422ToARGBRow = I422ToARGBRow_SSSE3;
|
| - }
|
| + I422ToARGBRow = I422ToARGBRow_SSSE3;
|
| }
|
| }
|
| #endif
|
| #if defined(HAS_I422TOARGBROW_AVX2)
|
| - if (TestCpuFlag(kCpuHasAVX2) && width >= 16) {
|
| + if (TestCpuFlag(kCpuHasAVX2)) {
|
| I422ToARGBRow = I422ToARGBRow_Any_AVX2;
|
| if (IS_ALIGNED(width, 16)) {
|
| I422ToARGBRow = I422ToARGBRow_AVX2;
|
| @@ -495,7 +490,7 @@ int I420ToARGB(const uint8* src_y, int src_stride_y,
|
| }
|
| #endif
|
| #if defined(HAS_I422TOARGBROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToARGBRow = I422ToARGBRow_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToARGBRow = I422ToARGBRow_NEON;
|
| @@ -548,23 +543,30 @@ int I420ToBGRA(const uint8* src_y, int src_stride_y,
|
| dst_stride_bgra = -dst_stride_bgra;
|
| }
|
| #if defined(HAS_I422TOBGRAROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToBGRARow = I422ToBGRARow_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| - I422ToBGRARow = I422ToBGRARow_Unaligned_SSSE3;
|
| - if (IS_ALIGNED(dst_bgra, 16) && IS_ALIGNED(dst_stride_bgra, 16)) {
|
| - I422ToBGRARow = I422ToBGRARow_SSSE3;
|
| - }
|
| + I422ToBGRARow = I422ToBGRARow_SSSE3;
|
| + }
|
| + }
|
| +#endif
|
| +#if defined(HAS_I422TOBGRAROW_AVX2)
|
| + if (TestCpuFlag(kCpuHasAVX2)) {
|
| + I422ToBGRARow = I422ToBGRARow_Any_AVX2;
|
| + if (IS_ALIGNED(width, 16)) {
|
| + I422ToBGRARow = I422ToBGRARow_AVX2;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOBGRAROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| +#endif
|
| +#if defined(HAS_I422TOBGRAROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToBGRARow = I422ToBGRARow_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToBGRARow = I422ToBGRARow_NEON;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOBGRAROW_MIPS_DSPR2)
|
| +#endif
|
| +#if defined(HAS_I422TOBGRAROW_MIPS_DSPR2)
|
| if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) &&
|
| IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
|
| IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
|
| @@ -610,17 +612,23 @@ int I420ToABGR(const uint8* src_y, int src_stride_y,
|
| dst_stride_abgr = -dst_stride_abgr;
|
| }
|
| #if defined(HAS_I422TOABGRROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToABGRRow = I422ToABGRRow_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| - I422ToABGRRow = I422ToABGRRow_Unaligned_SSSE3;
|
| - if (IS_ALIGNED(dst_abgr, 16) && IS_ALIGNED(dst_stride_abgr, 16)) {
|
| - I422ToABGRRow = I422ToABGRRow_SSSE3;
|
| - }
|
| + I422ToABGRRow = I422ToABGRRow_SSSE3;
|
| + }
|
| + }
|
| +#endif
|
| +#if defined(HAS_I422TOABGRROW_AVX2)
|
| + if (TestCpuFlag(kCpuHasAVX2)) {
|
| + I422ToABGRRow = I422ToABGRRow_Any_AVX2;
|
| + if (IS_ALIGNED(width, 16)) {
|
| + I422ToABGRRow = I422ToABGRRow_AVX2;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOABGRROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| +#endif
|
| +#if defined(HAS_I422TOABGRROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToABGRRow = I422ToABGRRow_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToABGRRow = I422ToABGRRow_NEON;
|
| @@ -664,17 +672,23 @@ int I420ToRGBA(const uint8* src_y, int src_stride_y,
|
| dst_stride_rgba = -dst_stride_rgba;
|
| }
|
| #if defined(HAS_I422TORGBAROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToRGBARow = I422ToRGBARow_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| - I422ToRGBARow = I422ToRGBARow_Unaligned_SSSE3;
|
| - if (IS_ALIGNED(dst_rgba, 16) && IS_ALIGNED(dst_stride_rgba, 16)) {
|
| - I422ToRGBARow = I422ToRGBARow_SSSE3;
|
| - }
|
| + I422ToRGBARow = I422ToRGBARow_SSSE3;
|
| + }
|
| + }
|
| +#endif
|
| +#if defined(HAS_I422TORGBAROW_AVX2)
|
| + if (TestCpuFlag(kCpuHasAVX2)) {
|
| + I422ToRGBARow = I422ToRGBARow_Any_AVX2;
|
| + if (IS_ALIGNED(width, 16)) {
|
| + I422ToRGBARow = I422ToRGBARow_AVX2;
|
| }
|
| }
|
| -#elif defined(HAS_I422TORGBAROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| +#endif
|
| +#if defined(HAS_I422TORGBAROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToRGBARow = I422ToRGBARow_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToRGBARow = I422ToRGBARow_NEON;
|
| @@ -718,14 +732,15 @@ int I420ToRGB24(const uint8* src_y, int src_stride_y,
|
| dst_stride_rgb24 = -dst_stride_rgb24;
|
| }
|
| #if defined(HAS_I422TORGB24ROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToRGB24Row = I422ToRGB24Row_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToRGB24Row = I422ToRGB24Row_SSSE3;
|
| }
|
| }
|
| -#elif defined(HAS_I422TORGB24ROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| +#endif
|
| +#if defined(HAS_I422TORGB24ROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToRGB24Row = I422ToRGB24Row_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToRGB24Row = I422ToRGB24Row_NEON;
|
| @@ -769,14 +784,15 @@ int I420ToRAW(const uint8* src_y, int src_stride_y,
|
| dst_stride_raw = -dst_stride_raw;
|
| }
|
| #if defined(HAS_I422TORAWROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToRAWRow = I422ToRAWRow_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToRAWRow = I422ToRAWRow_SSSE3;
|
| }
|
| }
|
| -#elif defined(HAS_I422TORAWROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| +#endif
|
| +#if defined(HAS_I422TORAWROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToRAWRow = I422ToRAWRow_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToRAWRow = I422ToRAWRow_NEON;
|
| @@ -820,14 +836,23 @@ int I420ToARGB1555(const uint8* src_y, int src_stride_y,
|
| dst_stride_argb1555 = -dst_stride_argb1555;
|
| }
|
| #if defined(HAS_I422TOARGB1555ROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToARGB1555Row = I422ToARGB1555Row_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToARGB1555Row = I422ToARGB1555Row_SSSE3;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOARGB1555ROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| +#endif
|
| +#if defined(HAS_I422TOARGB1555ROW_AVX2)
|
| + if (TestCpuFlag(kCpuHasAVX2)) {
|
| + I422ToARGB1555Row = I422ToARGB1555Row_Any_AVX2;
|
| + if (IS_ALIGNED(width, 16)) {
|
| + I422ToARGB1555Row = I422ToARGB1555Row_AVX2;
|
| + }
|
| + }
|
| +#endif
|
| +#if defined(HAS_I422TOARGB1555ROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToARGB1555Row = I422ToARGB1555Row_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToARGB1555Row = I422ToARGB1555Row_NEON;
|
| @@ -872,14 +897,23 @@ int I420ToARGB4444(const uint8* src_y, int src_stride_y,
|
| dst_stride_argb4444 = -dst_stride_argb4444;
|
| }
|
| #if defined(HAS_I422TOARGB4444ROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToARGB4444Row = I422ToARGB4444Row_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToARGB4444Row = I422ToARGB4444Row_SSSE3;
|
| }
|
| }
|
| -#elif defined(HAS_I422TOARGB4444ROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| +#endif
|
| +#if defined(HAS_I422TOARGB4444ROW_AVX2)
|
| + if (TestCpuFlag(kCpuHasAVX2)) {
|
| + I422ToARGB4444Row = I422ToARGB4444Row_Any_AVX2;
|
| + if (IS_ALIGNED(width, 16)) {
|
| + I422ToARGB4444Row = I422ToARGB4444Row_AVX2;
|
| + }
|
| + }
|
| +#endif
|
| +#if defined(HAS_I422TOARGB4444ROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToARGB4444Row = I422ToARGB4444Row_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToARGB4444Row = I422ToARGB4444Row_NEON;
|
| @@ -923,14 +957,23 @@ int I420ToRGB565(const uint8* src_y, int src_stride_y,
|
| dst_stride_rgb565 = -dst_stride_rgb565;
|
| }
|
| #if defined(HAS_I422TORGB565ROW_SSSE3)
|
| - if (TestCpuFlag(kCpuHasSSSE3) && width >= 8) {
|
| + if (TestCpuFlag(kCpuHasSSSE3)) {
|
| I422ToRGB565Row = I422ToRGB565Row_Any_SSSE3;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToRGB565Row = I422ToRGB565Row_SSSE3;
|
| }
|
| }
|
| -#elif defined(HAS_I422TORGB565ROW_NEON)
|
| - if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
|
| +#endif
|
| +#if defined(HAS_I422TORGB565ROW_AVX2)
|
| + if (TestCpuFlag(kCpuHasAVX2)) {
|
| + I422ToRGB565Row = I422ToRGB565Row_Any_AVX2;
|
| + if (IS_ALIGNED(width, 16)) {
|
| + I422ToRGB565Row = I422ToRGB565Row_AVX2;
|
| + }
|
| + }
|
| +#endif
|
| +#if defined(HAS_I422TORGB565ROW_NEON)
|
| + if (TestCpuFlag(kCpuHasNEON)) {
|
| I422ToRGB565Row = I422ToRGB565Row_Any_NEON;
|
| if (IS_ALIGNED(width, 8)) {
|
| I422ToRGB565Row = I422ToRGB565Row_NEON;
|
| @@ -1054,38 +1097,6 @@ int ConvertFromI420(const uint8* y, int y_stride,
|
| dst_sample_stride ? dst_sample_stride : width * 4,
|
| width, height);
|
| break;
|
| - case FOURCC_BGGR:
|
| - r = I420ToBayerBGGR(y, y_stride,
|
| - u, u_stride,
|
| - v, v_stride,
|
| - dst_sample,
|
| - dst_sample_stride ? dst_sample_stride : width,
|
| - width, height);
|
| - break;
|
| - case FOURCC_GBRG:
|
| - r = I420ToBayerGBRG(y, y_stride,
|
| - u, u_stride,
|
| - v, v_stride,
|
| - dst_sample,
|
| - dst_sample_stride ? dst_sample_stride : width,
|
| - width, height);
|
| - break;
|
| - case FOURCC_GRBG:
|
| - r = I420ToBayerGRBG(y, y_stride,
|
| - u, u_stride,
|
| - v, v_stride,
|
| - dst_sample,
|
| - dst_sample_stride ? dst_sample_stride : width,
|
| - width, height);
|
| - break;
|
| - case FOURCC_RGGB:
|
| - r = I420ToBayerRGGB(y, y_stride,
|
| - u, u_stride,
|
| - v, v_stride,
|
| - dst_sample,
|
| - dst_sample_stride ? dst_sample_stride : width,
|
| - width, height);
|
| - break;
|
| case FOURCC_I400:
|
| r = I400Copy(y, y_stride,
|
| dst_sample,
|
| @@ -1116,7 +1127,7 @@ int ConvertFromI420(const uint8* y, int y_stride,
|
| width, height);
|
| break;
|
| }
|
| - // TODO(fbarchard): Add M420 and Q420.
|
| + // TODO(fbarchard): Add M420.
|
| // Triplanar formats
|
| // TODO(fbarchard): halfstride instead of halfwidth
|
| case FOURCC_I420:
|
|
|