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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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59 V(IA32Movzxbl) \ | 59 V(IA32Movzxbl) \ |
60 V(IA32Movb) \ | 60 V(IA32Movb) \ |
61 V(IA32Movsxwl) \ | 61 V(IA32Movsxwl) \ |
62 V(IA32Movzxwl) \ | 62 V(IA32Movzxwl) \ |
63 V(IA32Movw) \ | 63 V(IA32Movw) \ |
64 V(IA32Movl) \ | 64 V(IA32Movl) \ |
65 V(IA32Movss) \ | 65 V(IA32Movss) \ |
66 V(IA32Movsd) \ | 66 V(IA32Movsd) \ |
67 V(IA32Lea) \ | 67 V(IA32Lea) \ |
68 V(IA32Push) \ | 68 V(IA32Push) \ |
69 V(IA32StoreWriteBarrier) | 69 V(IA32StoreWriteBarrier) \ |
| 70 V(IA32StackCheck) |
70 | 71 |
71 | 72 |
72 // Addressing modes represent the "shape" of inputs to an instruction. | 73 // Addressing modes represent the "shape" of inputs to an instruction. |
73 // Many instructions support multiple addressing modes. Addressing modes | 74 // Many instructions support multiple addressing modes. Addressing modes |
74 // are encoded into the InstructionCode of the instruction and tell the | 75 // are encoded into the InstructionCode of the instruction and tell the |
75 // code generator after register allocation which assembler method to call. | 76 // code generator after register allocation which assembler method to call. |
76 // | 77 // |
77 // We use the following local notation for addressing modes: | 78 // We use the following local notation for addressing modes: |
78 // | 79 // |
79 // M = memory operand | 80 // M = memory operand |
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100 V(M2I) /* [ %r2*2 + K] */ \ | 101 V(M2I) /* [ %r2*2 + K] */ \ |
101 V(M4I) /* [ %r2*4 + K] */ \ | 102 V(M4I) /* [ %r2*4 + K] */ \ |
102 V(M8I) /* [ %r2*8 + K] */ \ | 103 V(M8I) /* [ %r2*8 + K] */ \ |
103 V(MI) /* [ K] */ | 104 V(MI) /* [ K] */ |
104 | 105 |
105 } // namespace compiler | 106 } // namespace compiler |
106 } // namespace internal | 107 } // namespace internal |
107 } // namespace v8 | 108 } // namespace v8 |
108 | 109 |
109 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 110 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
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