Use a different variant of CpuFeatures::FlushICache asm with clang.

src/arm/cpu-arm.cc

 // Copyright 2006-2009 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // CPU specific code for arm independent of OS goes here.
 #ifdef __arm__
 #ifdef __QNXNTO__
 #include <sys/mman.h>  // for cache flushing.
 #undef MAP_TYPE
 #else
@@ skipping 27 matching lines @@
   Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size);
 
 #elif V8_OS_QNX
   msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
 
 #else
   register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start);
   register uint32_t end asm("r1") = beg + size;
   register uint32_t flg asm("r2") = 0;
 
+#ifdef __clang__
+  // This variant of the asm avoids a constant pool entry, which can be
+  // problematic when LTO'ing. It is also slightly shorter.
+  register uint32_t scno asm("r7") = __ARM_NR_cacheflush;

[bnoordhuis, 2015/03/07 18:34:49]

I don't think it's safe to assume that the compiler will actually load the value
into the register this way.

A peephole optimizer can't see into the asm block and won't realize that the
register is actually used.  It may opt to remove the load.

[pcc1, 2015/03/07 21:26:39]

Please see https://gcc.gnu.org/onlinedocs/gcc/Local-Reg-Vars.html#Local-Reg-Vars
:

"However, using the variable as an input or output operand to the asm guarantees
that the specified register is used for that operand."

Note also that r0, r1, r2 are already being set in the same way. (Clang has the
same inline asm semantics as GCC, so it works the same way.)

+
+  asm volatile("svc 0\n"
+               :
+               : "r"(beg), "r"(end), "r"(flg), "r"(scno)
+               : "memory");
+#else
+  // Use a different variant of the asm with GCC because some versions doesn't
+  // support r7 as an asm input.
   asm volatile(
     // This assembly works for both ARM and Thumb targets.
 
     // Preserve r7; it is callee-saved, and GCC uses it as a frame pointer for
     // Thumb targets.
     "  push {r7}\n"
                                   // r0 = beg
                                   // r1 = end
                                   // r2 = flags (0)
     "  ldr r7, =%c[scno]\n"       // r7 = syscall number
     "  svc 0\n"
 
     "  pop {r7}\n"
     :
     : "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush)
     : "memory");
 #endif
+#endif
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM