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Issue 980163002: [ia32] Fix typo in no-SSE4.1 code. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/v8.h" 5 #include "src/v8.h"
6 6
7 #if V8_TARGET_ARCH_IA32 7 #if V8_TARGET_ARCH_IA32
8 8
9 #include "src/base/bits.h" 9 #include "src/base/bits.h"
10 #include "src/base/division-by-constant.h" 10 #include "src/base/division-by-constant.h"
(...skipping 2435 matching lines...) Expand 10 before | Expand all | Expand 10 after
2446 movd(dst, src); 2446 movd(dst, src);
2447 return; 2447 return;
2448 } 2448 }
2449 DCHECK_EQ(1, imm8); 2449 DCHECK_EQ(1, imm8);
2450 if (CpuFeatures::IsSupported(SSE4_1)) { 2450 if (CpuFeatures::IsSupported(SSE4_1)) {
2451 CpuFeatureScope sse_scope(this, SSE4_1); 2451 CpuFeatureScope sse_scope(this, SSE4_1);
2452 pextrd(dst, src, imm8); 2452 pextrd(dst, src, imm8);
2453 return; 2453 return;
2454 } 2454 }
2455 pshufd(xmm0, src, 1); 2455 pshufd(xmm0, src, 1);
2456 movd(dst, src); 2456 movd(dst, xmm0);
2457 } 2457 }
2458 2458
2459 2459
2460 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { 2460 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) {
2461 DCHECK(imm8 == 0 || imm8 == 1); 2461 DCHECK(imm8 == 0 || imm8 == 1);
2462 if (CpuFeatures::IsSupported(SSE4_1)) { 2462 if (CpuFeatures::IsSupported(SSE4_1)) {
2463 CpuFeatureScope sse_scope(this, SSE4_1); 2463 CpuFeatureScope sse_scope(this, SSE4_1);
2464 pinsrd(dst, src, imm8); 2464 pinsrd(dst, src, imm8);
2465 return; 2465 return;
2466 } 2466 }
(...skipping 768 matching lines...) Expand 10 before | Expand all | Expand 10 after
3235 if (mag.shift > 0) sar(edx, mag.shift); 3235 if (mag.shift > 0) sar(edx, mag.shift);
3236 mov(eax, dividend); 3236 mov(eax, dividend);
3237 shr(eax, 31); 3237 shr(eax, 31);
3238 add(edx, eax); 3238 add(edx, eax);
3239 } 3239 }
3240 3240
3241 3241
3242 } } // namespace v8::internal 3242 } } // namespace v8::internal
3243 3243
3244 #endif // V8_TARGET_ARCH_IA32 3244 #endif // V8_TARGET_ARCH_IA32
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