MIPS: [turbofan] Support for %_DoubleHi, %_DoubleLo and %_ConstructDouble.

src/compiler/mips/code-generator-mips.cc

Index: src/compiler/mips/code-generator-mips.cc
diff --git a/src/compiler/mips/code-generator-mips.cc b/src/compiler/mips/code-generator-mips.cc
index 997f3fe591708c29e7f9a5d342e8ff9a2b65d019..1083ec1dddcbc55789d7917883a7151db83da463 100644
--- a/src/compiler/mips/code-generator-mips.cc
+++ b/src/compiler/mips/code-generator-mips.cc
@@ -621,6 +621,24 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       __ Trunc_uw_d(i.InputDoubleRegister(0), i.OutputRegister(), scratch);
       break;
     }
+    case kMipsFmoveLowUwD:
+      __ FmoveLow(i.OutputRegister(), i.InputDoubleRegister(0));
+      break;
+    case kMipsFmoveLowDUw:
+      if (CpuFeatures::IsSupported(FP64FPU)) {

[dusmil.imgtec, 2015/03/05 14:58:21]

The selection is not good, you forced runtime checks.
Use macro version for moves which hides fpu mode selection.

[balazs.kilvady, 2015/03/05 17:25:55]

Done.

+        __ mfhc1(at, i.OutputDoubleRegister());
+      }
+      __ FmoveLow(i.OutputDoubleRegister(), i.InputRegister(1));
+      if (CpuFeatures::IsSupported(FP64FPU)) {
+        __ mthc1(at, i.OutputDoubleRegister());
+      }
+      break;
+    case kMipsFmoveHighUwD:
+      __ FmoveHigh(i.OutputRegister(), i.InputDoubleRegister(0));
+      break;
+    case kMipsFmoveHighDUw:
+      __ FmoveHigh(i.OutputDoubleRegister(), i.InputRegister(1));
+      break;
     // ... more basic instructions ...
 
     case kMipsLbu: