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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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177 icache_flush_mode); | 177 icache_flush_mode); |
178 if (write_barrier_mode == UPDATE_WRITE_BARRIER && | 178 if (write_barrier_mode == UPDATE_WRITE_BARRIER && |
179 host() != NULL && | 179 host() != NULL && |
180 target->IsHeapObject()) { | 180 target->IsHeapObject()) { |
181 host()->GetHeap()->incremental_marking()->RecordWrite( | 181 host()->GetHeap()->incremental_marking()->RecordWrite( |
182 host(), &Memory::Object_at(pc_), HeapObject::cast(target)); | 182 host(), &Memory::Object_at(pc_), HeapObject::cast(target)); |
183 } | 183 } |
184 } | 184 } |
185 | 185 |
186 | 186 |
187 Address RelocInfo::target_reference() { | 187 Address RelocInfo::target_external_reference() { |
188 DCHECK(rmode_ == EXTERNAL_REFERENCE); | 188 DCHECK(rmode_ == EXTERNAL_REFERENCE); |
189 return Assembler::target_address_at(pc_, host_); | 189 return Assembler::target_address_at(pc_, host_); |
190 } | 190 } |
191 | 191 |
192 | 192 |
| 193 Address RelocInfo::target_internal_reference() { |
| 194 DCHECK(rmode_ == INTERNAL_REFERENCE); |
| 195 return Memory::Address_at(pc_); |
| 196 } |
| 197 |
| 198 |
| 199 void RelocInfo::set_target_internal_reference(Address target) { |
| 200 DCHECK(rmode_ == INTERNAL_REFERENCE); |
| 201 Memory::Address_at(pc_) = target; |
| 202 } |
| 203 |
| 204 |
193 Address RelocInfo::target_runtime_entry(Assembler* origin) { | 205 Address RelocInfo::target_runtime_entry(Assembler* origin) { |
194 DCHECK(IsRuntimeEntry(rmode_)); | 206 DCHECK(IsRuntimeEntry(rmode_)); |
195 return target_address(); | 207 return target_address(); |
196 } | 208 } |
197 | 209 |
198 | 210 |
199 void RelocInfo::set_target_runtime_entry(Address target, | 211 void RelocInfo::set_target_runtime_entry(Address target, |
200 WriteBarrierMode write_barrier_mode, | 212 WriteBarrierMode write_barrier_mode, |
201 ICacheFlushMode icache_flush_mode) { | 213 ICacheFlushMode icache_flush_mode) { |
202 DCHECK(IsRuntimeEntry(rmode_)); | 214 DCHECK(IsRuntimeEntry(rmode_)); |
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669 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 681 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
670 CpuFeatures::FlushICache(pc, 4 * kInstrSize); | 682 CpuFeatures::FlushICache(pc, 4 * kInstrSize); |
671 } | 683 } |
672 } | 684 } |
673 } | 685 } |
674 | 686 |
675 | 687 |
676 } } // namespace v8::internal | 688 } } // namespace v8::internal |
677 | 689 |
678 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ | 690 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ |
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