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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <stdarg.h> | 5 #include <stdarg.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 #include <cmath> | 7 #include <cmath> |
8 | 8 |
9 #include "src/v8.h" | 9 #include "src/v8.h" |
10 | 10 |
11 #if V8_TARGET_ARCH_PPC | 11 #if V8_TARGET_ARCH_PPC |
12 | 12 |
13 #include "src/assembler.h" | 13 #include "src/assembler.h" |
| 14 #include "src/base/bits.h" |
14 #include "src/codegen.h" | 15 #include "src/codegen.h" |
15 #include "src/disasm.h" | 16 #include "src/disasm.h" |
16 #include "src/ppc/constants-ppc.h" | 17 #include "src/ppc/constants-ppc.h" |
17 #include "src/ppc/frames-ppc.h" | 18 #include "src/ppc/frames-ppc.h" |
18 #include "src/ppc/simulator-ppc.h" | 19 #include "src/ppc/simulator-ppc.h" |
19 | 20 |
20 #if defined(USE_SIMULATOR) | 21 #if defined(USE_SIMULATOR) |
21 | 22 |
22 // Only build the simulator if not compiling for real PPC hardware. | 23 // Only build the simulator if not compiling for real PPC hardware. |
23 namespace v8 { | 24 namespace v8 { |
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2991 void Simulator::ExecuteExt5(Instruction* instr) { | 2992 void Simulator::ExecuteExt5(Instruction* instr) { |
2992 switch (instr->Bits(4, 2) << 2) { | 2993 switch (instr->Bits(4, 2) << 2) { |
2993 case RLDICL: { | 2994 case RLDICL: { |
2994 int ra = instr->RAValue(); | 2995 int ra = instr->RAValue(); |
2995 int rs = instr->RSValue(); | 2996 int rs = instr->RSValue(); |
2996 uintptr_t rs_val = get_register(rs); | 2997 uintptr_t rs_val = get_register(rs); |
2997 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5)); | 2998 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5)); |
2998 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); | 2999 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); |
2999 DCHECK(sh >= 0 && sh <= 63); | 3000 DCHECK(sh >= 0 && sh <= 63); |
3000 DCHECK(mb >= 0 && mb <= 63); | 3001 DCHECK(mb >= 0 && mb <= 63); |
3001 // rotate left | 3002 uintptr_t result = base::bits::RotateLeft64(rs_val, sh); |
3002 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh)); | |
3003 uintptr_t mask = 0xffffffffffffffff >> mb; | 3003 uintptr_t mask = 0xffffffffffffffff >> mb; |
3004 result &= mask; | 3004 result &= mask; |
3005 set_register(ra, result); | 3005 set_register(ra, result); |
3006 if (instr->Bit(0)) { // RC bit set | 3006 if (instr->Bit(0)) { // RC bit set |
3007 SetCR0(result); | 3007 SetCR0(result); |
3008 } | 3008 } |
3009 return; | 3009 return; |
3010 } | 3010 } |
3011 case RLDICR: { | 3011 case RLDICR: { |
3012 int ra = instr->RAValue(); | 3012 int ra = instr->RAValue(); |
3013 int rs = instr->RSValue(); | 3013 int rs = instr->RSValue(); |
3014 uintptr_t rs_val = get_register(rs); | 3014 uintptr_t rs_val = get_register(rs); |
3015 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5)); | 3015 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5)); |
3016 int me = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); | 3016 int me = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); |
3017 DCHECK(sh >= 0 && sh <= 63); | 3017 DCHECK(sh >= 0 && sh <= 63); |
3018 DCHECK(me >= 0 && me <= 63); | 3018 DCHECK(me >= 0 && me <= 63); |
3019 // rotate left | 3019 uintptr_t result = base::bits::RotateLeft64(rs_val, sh); |
3020 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh)); | |
3021 uintptr_t mask = 0xffffffffffffffff << (63 - me); | 3020 uintptr_t mask = 0xffffffffffffffff << (63 - me); |
3022 result &= mask; | 3021 result &= mask; |
3023 set_register(ra, result); | 3022 set_register(ra, result); |
3024 if (instr->Bit(0)) { // RC bit set | 3023 if (instr->Bit(0)) { // RC bit set |
3025 SetCR0(result); | 3024 SetCR0(result); |
3026 } | 3025 } |
3027 return; | 3026 return; |
3028 } | 3027 } |
3029 case RLDIC: { | 3028 case RLDIC: { |
3030 int ra = instr->RAValue(); | 3029 int ra = instr->RAValue(); |
3031 int rs = instr->RSValue(); | 3030 int rs = instr->RSValue(); |
3032 uintptr_t rs_val = get_register(rs); | 3031 uintptr_t rs_val = get_register(rs); |
3033 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5)); | 3032 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5)); |
3034 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); | 3033 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); |
3035 DCHECK(sh >= 0 && sh <= 63); | 3034 DCHECK(sh >= 0 && sh <= 63); |
3036 DCHECK(mb >= 0 && mb <= 63); | 3035 DCHECK(mb >= 0 && mb <= 63); |
3037 // rotate left | 3036 uintptr_t result = base::bits::RotateLeft64(rs_val, sh); |
3038 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh)); | |
3039 uintptr_t mask = (0xffffffffffffffff >> mb) & (0xffffffffffffffff << sh); | 3037 uintptr_t mask = (0xffffffffffffffff >> mb) & (0xffffffffffffffff << sh); |
3040 result &= mask; | 3038 result &= mask; |
3041 set_register(ra, result); | 3039 set_register(ra, result); |
3042 if (instr->Bit(0)) { // RC bit set | 3040 if (instr->Bit(0)) { // RC bit set |
3043 SetCR0(result); | 3041 SetCR0(result); |
3044 } | 3042 } |
3045 return; | 3043 return; |
3046 } | 3044 } |
3047 case RLDIMI: { | 3045 case RLDIMI: { |
3048 int ra = instr->RAValue(); | 3046 int ra = instr->RAValue(); |
3049 int rs = instr->RSValue(); | 3047 int rs = instr->RSValue(); |
3050 uintptr_t rs_val = get_register(rs); | 3048 uintptr_t rs_val = get_register(rs); |
3051 intptr_t ra_val = get_register(ra); | 3049 intptr_t ra_val = get_register(ra); |
3052 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5)); | 3050 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5)); |
3053 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); | 3051 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); |
3054 int me = 63 - sh; | 3052 int me = 63 - sh; |
3055 // rotate left | 3053 uintptr_t result = base::bits::RotateLeft64(rs_val, sh); |
3056 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh)); | |
3057 uintptr_t mask = 0; | 3054 uintptr_t mask = 0; |
3058 if (mb < me + 1) { | 3055 if (mb < me + 1) { |
3059 uintptr_t bit = 0x8000000000000000 >> mb; | 3056 uintptr_t bit = 0x8000000000000000 >> mb; |
3060 for (; mb <= me; mb++) { | 3057 for (; mb <= me; mb++) { |
3061 mask |= bit; | 3058 mask |= bit; |
3062 bit >>= 1; | 3059 bit >>= 1; |
3063 } | 3060 } |
3064 } else if (mb == me + 1) { | 3061 } else if (mb == me + 1) { |
3065 mask = 0xffffffffffffffff; | 3062 mask = 0xffffffffffffffff; |
3066 } else { // mb > me+1 | 3063 } else { // mb > me+1 |
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3085 case RLDCL: { | 3082 case RLDCL: { |
3086 int ra = instr->RAValue(); | 3083 int ra = instr->RAValue(); |
3087 int rs = instr->RSValue(); | 3084 int rs = instr->RSValue(); |
3088 int rb = instr->RBValue(); | 3085 int rb = instr->RBValue(); |
3089 uintptr_t rs_val = get_register(rs); | 3086 uintptr_t rs_val = get_register(rs); |
3090 uintptr_t rb_val = get_register(rb); | 3087 uintptr_t rb_val = get_register(rb); |
3091 int sh = (rb_val & 0x3f); | 3088 int sh = (rb_val & 0x3f); |
3092 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); | 3089 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); |
3093 DCHECK(sh >= 0 && sh <= 63); | 3090 DCHECK(sh >= 0 && sh <= 63); |
3094 DCHECK(mb >= 0 && mb <= 63); | 3091 DCHECK(mb >= 0 && mb <= 63); |
3095 // rotate left | 3092 uintptr_t result = base::bits::RotateLeft64(rs_val, sh); |
3096 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh)); | |
3097 uintptr_t mask = 0xffffffffffffffff >> mb; | 3093 uintptr_t mask = 0xffffffffffffffff >> mb; |
3098 result &= mask; | 3094 result &= mask; |
3099 set_register(ra, result); | 3095 set_register(ra, result); |
3100 if (instr->Bit(0)) { // RC bit set | 3096 if (instr->Bit(0)) { // RC bit set |
3101 SetCR0(result); | 3097 SetCR0(result); |
3102 } | 3098 } |
3103 return; | 3099 return; |
3104 } | 3100 } |
3105 } | 3101 } |
3106 UNIMPLEMENTED(); // Not used by V8. | 3102 UNIMPLEMENTED(); // Not used by V8. |
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3261 break; | 3257 break; |
3262 } | 3258 } |
3263 case RLWIMIX: { | 3259 case RLWIMIX: { |
3264 int ra = instr->RAValue(); | 3260 int ra = instr->RAValue(); |
3265 int rs = instr->RSValue(); | 3261 int rs = instr->RSValue(); |
3266 uint32_t rs_val = get_register(rs); | 3262 uint32_t rs_val = get_register(rs); |
3267 int32_t ra_val = get_register(ra); | 3263 int32_t ra_val = get_register(ra); |
3268 int sh = instr->Bits(15, 11); | 3264 int sh = instr->Bits(15, 11); |
3269 int mb = instr->Bits(10, 6); | 3265 int mb = instr->Bits(10, 6); |
3270 int me = instr->Bits(5, 1); | 3266 int me = instr->Bits(5, 1); |
3271 // rotate left | 3267 uint32_t result = base::bits::RotateLeft32(rs_val, sh); |
3272 uint32_t result = (rs_val << sh) | (rs_val >> (32 - sh)); | |
3273 int mask = 0; | 3268 int mask = 0; |
3274 if (mb < me + 1) { | 3269 if (mb < me + 1) { |
3275 int bit = 0x80000000 >> mb; | 3270 int bit = 0x80000000 >> mb; |
3276 for (; mb <= me; mb++) { | 3271 for (; mb <= me; mb++) { |
3277 mask |= bit; | 3272 mask |= bit; |
3278 bit >>= 1; | 3273 bit >>= 1; |
3279 } | 3274 } |
3280 } else if (mb == me + 1) { | 3275 } else if (mb == me + 1) { |
3281 mask = 0xffffffff; | 3276 mask = 0xffffffff; |
3282 } else { // mb > me+1 | 3277 } else { // mb > me+1 |
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3304 int sh = 0; | 3299 int sh = 0; |
3305 if (opcode == RLWINMX) { | 3300 if (opcode == RLWINMX) { |
3306 sh = instr->Bits(15, 11); | 3301 sh = instr->Bits(15, 11); |
3307 } else { | 3302 } else { |
3308 int rb = instr->RBValue(); | 3303 int rb = instr->RBValue(); |
3309 uint32_t rb_val = get_register(rb); | 3304 uint32_t rb_val = get_register(rb); |
3310 sh = (rb_val & 0x1f); | 3305 sh = (rb_val & 0x1f); |
3311 } | 3306 } |
3312 int mb = instr->Bits(10, 6); | 3307 int mb = instr->Bits(10, 6); |
3313 int me = instr->Bits(5, 1); | 3308 int me = instr->Bits(5, 1); |
3314 // rotate left | 3309 uint32_t result = base::bits::RotateLeft32(rs_val, sh); |
3315 uint32_t result = (rs_val << sh) | (rs_val >> (32 - sh)); | |
3316 int mask = 0; | 3310 int mask = 0; |
3317 if (mb < me + 1) { | 3311 if (mb < me + 1) { |
3318 int bit = 0x80000000 >> mb; | 3312 int bit = 0x80000000 >> mb; |
3319 for (; mb <= me; mb++) { | 3313 for (; mb <= me; mb++) { |
3320 mask |= bit; | 3314 mask |= bit; |
3321 bit >>= 1; | 3315 bit >>= 1; |
3322 } | 3316 } |
3323 } else if (mb == me + 1) { | 3317 } else if (mb == me + 1) { |
3324 mask = 0xffffffff; | 3318 mask = 0xffffffff; |
3325 } else { // mb > me+1 | 3319 } else { // mb > me+1 |
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3881 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); | 3875 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); |
3882 uintptr_t address = *stack_slot; | 3876 uintptr_t address = *stack_slot; |
3883 set_register(sp, current_sp + sizeof(uintptr_t)); | 3877 set_register(sp, current_sp + sizeof(uintptr_t)); |
3884 return address; | 3878 return address; |
3885 } | 3879 } |
3886 } | 3880 } |
3887 } // namespace v8::internal | 3881 } // namespace v8::internal |
3888 | 3882 |
3889 #endif // USE_SIMULATOR | 3883 #endif // USE_SIMULATOR |
3890 #endif // V8_TARGET_ARCH_PPC | 3884 #endif // V8_TARGET_ARCH_PPC |
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