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Issue 975283002: Use Rotate*() functions instead of doing this manually. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: . Created 5 years, 9 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> 5 #include <limits.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdlib.h> 7 #include <stdlib.h>
8 #include <cmath> 8 #include <cmath>
9 9
10 #include "src/v8.h" 10 #include "src/v8.h"
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2005 break; 2005 break;
2006 case SRL: 2006 case SRL:
2007 if (rs_reg == 0) { 2007 if (rs_reg == 0) {
2008 // Regular logical right shift of a word by a fixed number of 2008 // Regular logical right shift of a word by a fixed number of
2009 // bits instruction. RS field is always equal to 0. 2009 // bits instruction. RS field is always equal to 0.
2010 *alu_out = (uint32_t)rt_u >> sa; 2010 *alu_out = (uint32_t)rt_u >> sa;
2011 } else { 2011 } else {
2012 // Logical right-rotate of a word by a fixed number of bits. This 2012 // Logical right-rotate of a word by a fixed number of bits. This
2013 // is special case of SRL instruction, added in MIPS32 Release 2. 2013 // is special case of SRL instruction, added in MIPS32 Release 2.
2014 // RS field is equal to 00001. 2014 // RS field is equal to 00001.
2015 *alu_out = ((uint32_t)rt_u >> sa) | ((uint32_t)rt_u << (32 - sa)); 2015 *alu_out = base::bits::RotateRight32((uint32_t)rt_u, sa);
2016 } 2016 }
2017 break; 2017 break;
2018 case DSRL: 2018 case DSRL:
2019 *alu_out = rt_u >> sa; 2019 *alu_out = rt_u >> sa;
2020 break; 2020 break;
2021 case DSRL32: 2021 case DSRL32:
2022 *alu_out = rt_u >> sa >> 32; 2022 *alu_out = rt_u >> sa >> 32;
2023 break; 2023 break;
2024 case SRA: 2024 case SRA:
2025 *alu_out = (int32_t)rt >> sa; 2025 *alu_out = (int32_t)rt >> sa;
(...skipping 12 matching lines...) Expand all
2038 break; 2038 break;
2039 case SRLV: 2039 case SRLV:
2040 if (sa == 0) { 2040 if (sa == 0) {
2041 // Regular logical right-shift of a word by a variable number of 2041 // Regular logical right-shift of a word by a variable number of
2042 // bits instruction. SA field is always equal to 0. 2042 // bits instruction. SA field is always equal to 0.
2043 *alu_out = (uint32_t)rt_u >> rs; 2043 *alu_out = (uint32_t)rt_u >> rs;
2044 } else { 2044 } else {
2045 // Logical right-rotate of a word by a variable number of bits. 2045 // Logical right-rotate of a word by a variable number of bits.
2046 // This is special case od SRLV instruction, added in MIPS32 2046 // This is special case od SRLV instruction, added in MIPS32
2047 // Release 2. SA field is equal to 00001. 2047 // Release 2. SA field is equal to 00001.
2048 *alu_out = 2048 *alu_out = base::bits::RotateRight32(((uint32_t)rt_u, rs_u);
2049 ((uint32_t)rt_u >> rs_u) | ((uint32_t)rt_u << (32 - rs_u));
2050 } 2049 }
2051 break; 2050 break;
2052 case DSRLV: 2051 case DSRLV:
2053 if (sa == 0) { 2052 if (sa == 0) {
2054 // Regular logical right-shift of a word by a variable number of 2053 // Regular logical right-shift of a word by a variable number of
2055 // bits instruction. SA field is always equal to 0. 2054 // bits instruction. SA field is always equal to 0.
2056 *alu_out = rt_u >> rs; 2055 *alu_out = rt_u >> rs;
2057 } else { 2056 } else {
2058 // Logical right-rotate of a word by a variable number of bits. 2057 // Logical right-rotate of a word by a variable number of bits.
2059 // This is special case od SRLV instruction, added in MIPS32 2058 // This is special case od SRLV instruction, added in MIPS32
2060 // Release 2. SA field is equal to 00001. 2059 // Release 2. SA field is equal to 00001.
2061 *alu_out = (rt_u >> rs_u) | (rt_u << (32 - rs_u)); 2060 *alu_out = base::bits::RotateRight32(rt_u, rs_u);
2062 } 2061 }
2063 break; 2062 break;
2064 case SRAV: 2063 case SRAV:
2065 *alu_out = (int32_t)rt >> rs; 2064 *alu_out = (int32_t)rt >> rs;
2066 break; 2065 break;
2067 case DSRAV: 2066 case DSRAV:
2068 *alu_out = rt >> rs; 2067 *alu_out = rt >> rs;
2069 break; 2068 break;
2070 case MFHI: // MFHI == CLZ on R6. 2069 case MFHI: // MFHI == CLZ on R6.
2071 if (kArchVariant != kMips64r6) { 2070 if (kArchVariant != kMips64r6) {
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3448 } 3447 }
3449 3448
3450 3449
3451 #undef UNSUPPORTED 3450 #undef UNSUPPORTED
3452 3451
3453 } } // namespace v8::internal 3452 } } // namespace v8::internal
3454 3453
3455 #endif // USE_SIMULATOR 3454 #endif // USE_SIMULATOR
3456 3455
3457 #endif // V8_TARGET_ARCH_MIPS64 3456 #endif // V8_TARGET_ARCH_MIPS64
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