| Index: src/compiler/x64/instruction-selector-x64.cc
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| diff --git a/src/compiler/x64/instruction-selector-x64.cc b/src/compiler/x64/instruction-selector-x64.cc
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| index 5c63f6330102146f6bb6c7ee0c6356ea719481b5..b00eee16dabb4a04725d1b51ae1108b2894eaa6d 100644
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| --- a/src/compiler/x64/instruction-selector-x64.cc
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| +++ b/src/compiler/x64/instruction-selector-x64.cc
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| @@ -1371,6 +1371,43 @@ void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) {
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|  }
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|  
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|  
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| +void InstructionSelector::VisitFloat64ExtractLowWord32(Node* node) {
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| +  X64OperandGenerator g(this);
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| +  Emit(kSSEFloat64ExtractLowWord32, g.DefineAsRegister(node),
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| +       g.Use(node->InputAt(0)));
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| +}
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| +
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| +
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| +void InstructionSelector::VisitFloat64ExtractHighWord32(Node* node) {
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| +  X64OperandGenerator g(this);
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| +  Emit(kSSEFloat64ExtractHighWord32, g.DefineAsRegister(node),
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| +       g.Use(node->InputAt(0)));
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| +}
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| +
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| +
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| +void InstructionSelector::VisitFloat64InsertLowWord32(Node* node) {
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| +  X64OperandGenerator g(this);
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| +  Node* left = node->InputAt(0);
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| +  Node* right = node->InputAt(1);
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| +  Float64Matcher mleft(left);
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| +  if (mleft.HasValue() && (bit_cast<uint64_t>(mleft.Value()) >> 32) == 0u) {
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| +    Emit(kSSEFloat64LoadLowWord32, g.DefineAsRegister(node), g.Use(right));
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| +    return;
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| +  }
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| +  Emit(kSSEFloat64InsertLowWord32, g.DefineSameAsFirst(node),
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| +       g.UseRegister(left), g.Use(right));
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| +}
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| +
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| +
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| +void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
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| +  X64OperandGenerator g(this);
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| +  Node* left = node->InputAt(0);
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| +  Node* right = node->InputAt(1);
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| +  Emit(kSSEFloat64InsertHighWord32, g.DefineSameAsFirst(node),
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| +       g.UseRegister(left), g.Use(right));
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| +}
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| +
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| +
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|  // static
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|  MachineOperatorBuilder::Flags
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|  InstructionSelector::SupportedMachineOperatorFlags() {
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| 
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