| Index: src/compiler/arm64/instruction-selector-arm64.cc | 
| diff --git a/src/compiler/arm64/instruction-selector-arm64.cc b/src/compiler/arm64/instruction-selector-arm64.cc | 
| index 1a071cd2d872e1fdec67ad84d3fb50befc19e05f..a27bd88733ee56e9ce8cdcfa40a7d4af3e63d114 100644 | 
| --- a/src/compiler/arm64/instruction-selector-arm64.cc | 
| +++ b/src/compiler/arm64/instruction-selector-arm64.cc | 
| @@ -1576,6 +1576,40 @@ void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) { | 
| } | 
|  | 
|  | 
| +void InstructionSelector::VisitFloat64ExtractLowWord32(Node* node) { | 
| +  Arm64OperandGenerator g(this); | 
| +  Emit(kArm64Float64ExtractLowWord32, g.DefineAsRegister(node), | 
| +       g.UseRegister(node->InputAt(0))); | 
| +} | 
| + | 
| + | 
| +void InstructionSelector::VisitFloat64ExtractHighWord32(Node* node) { | 
| +  Arm64OperandGenerator g(this); | 
| +  Emit(kArm64Float64ExtractHighWord32, g.DefineAsRegister(node), | 
| +       g.UseRegister(node->InputAt(0))); | 
| +} | 
| + | 
| + | 
| +void InstructionSelector::VisitFloat64InsertLowWord32(Node* node) { | 
| +  // TODO(arm64): Some AArch64 specialist should be able to improve this. | 
| +  Arm64OperandGenerator g(this); | 
| +  Node* left = node->InputAt(0); | 
| +  Node* right = node->InputAt(1); | 
| +  Emit(kArm64Float64InsertLowWord32, g.DefineAsRegister(node), | 
| +       g.UseRegister(left), g.UseRegister(right)); | 
| +} | 
| + | 
| + | 
| +void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) { | 
| +  // TODO(arm64): Some AArch64 specialist should be able to improve this. | 
| +  Arm64OperandGenerator g(this); | 
| +  Node* left = node->InputAt(0); | 
| +  Node* right = node->InputAt(1); | 
| +  Emit(kArm64Float64InsertHighWord32, g.DefineAsRegister(node), | 
| +       g.UseRegister(left), g.UseRegister(right)); | 
| +} | 
| + | 
| + | 
| // static | 
| MachineOperatorBuilder::Flags | 
| InstructionSelector::SupportedMachineOperatorFlags() { | 
|  |