| Index: src/x64/macro-assembler-x64.cc | 
| diff --git a/src/x64/macro-assembler-x64.cc b/src/x64/macro-assembler-x64.cc | 
| index 8e4448d46fceeacfd090b749d86e1e3b98c5a8f1..e4203618fcaa818bdb4441ac3345e3c4d43f0e4f 100644 | 
| --- a/src/x64/macro-assembler-x64.cc | 
| +++ b/src/x64/macro-assembler-x64.cc | 
| @@ -2832,6 +2832,59 @@ void MacroAssembler::Call(Handle<Code> code_object, | 
| } | 
|  | 
|  | 
| +void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) { | 
| +  if (imm8 == 0) { | 
| +    movd(dst, src); | 
| +    return; | 
| +  } | 
| +  DCHECK_EQ(1, imm8); | 
| +  if (CpuFeatures::IsSupported(SSE4_1)) { | 
| +    CpuFeatureScope sse_scope(this, SSE4_1); | 
| +    pextrd(dst, src, imm8); | 
| +    return; | 
| +  } | 
| +  movq(dst, src); | 
| +  shrq(dst, Immediate(32)); | 
| +} | 
| + | 
| + | 
| +void MacroAssembler::Pinsrd(XMMRegister dst, Register src, int8_t imm8) { | 
| +  if (CpuFeatures::IsSupported(SSE4_1)) { | 
| +    CpuFeatureScope sse_scope(this, SSE4_1); | 
| +    pinsrd(dst, src, imm8); | 
| +    return; | 
| +  } | 
| +  movd(xmm0, src); | 
| +  if (imm8 == 1) { | 
| +    punpckldq(dst, xmm0); | 
| +  } else { | 
| +    DCHECK_EQ(0, imm8); | 
| +    psrlq(dst, 32); | 
| +    punpckldq(xmm0, dst); | 
| +    movaps(dst, xmm0); | 
| +  } | 
| +} | 
| + | 
| + | 
| +void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { | 
| +  DCHECK(imm8 == 0 || imm8 == 1); | 
| +  if (CpuFeatures::IsSupported(SSE4_1)) { | 
| +    CpuFeatureScope sse_scope(this, SSE4_1); | 
| +    pinsrd(dst, src, imm8); | 
| +    return; | 
| +  } | 
| +  movd(xmm0, src); | 
| +  if (imm8 == 1) { | 
| +    punpckldq(dst, xmm0); | 
| +  } else { | 
| +    DCHECK_EQ(0, imm8); | 
| +    psrlq(dst, 32); | 
| +    punpckldq(xmm0, dst); | 
| +    movaps(dst, xmm0); | 
| +  } | 
| +} | 
| + | 
| + | 
| void MacroAssembler::Pushad() { | 
| Push(rax); | 
| Push(rcx); | 
|  |