[turbofan] Support for %_DoubleHi, %_DoubleLo and %_ConstructDouble.

src/compiler/ia32/instruction-selector-ia32.cc

Index: src/compiler/ia32/instruction-selector-ia32.cc
diff --git a/src/compiler/ia32/instruction-selector-ia32.cc b/src/compiler/ia32/instruction-selector-ia32.cc
index 8a352e29972ce8d14c557641692c37785c4ea506..b3b07613e09778bcb1f1550d871e60013abeef75 100644
--- a/src/compiler/ia32/instruction-selector-ia32.cc
+++ b/src/compiler/ia32/instruction-selector-ia32.cc
@@ -1068,6 +1068,41 @@ void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) {
 }
 
 
+void InstructionSelector::VisitFloat64ExtractWord32(Node* node) {
+  IA32OperandGenerator g(this);
+  InstructionCode opcode = (OpParameter<int>(node) == 0)
+                               ? kSSEFloat64ExtractLowWord32
+                               : kSSEFloat64ExtractHighWord32;
+  Emit(opcode, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
+}
+
+
+void InstructionSelector::VisitFloat64InsertWord32(Node* node) {
+  IA32OperandGenerator g(this);
+  Node* left = node->InputAt(0);
+  Node* right = node->InputAt(1);
+  InstructionCode opcode;
+  switch (OpParameter<int>(node)) {
+    case 0: {
+      Float64Matcher mleft(left);
+      if (mleft.HasValue() && (bit_cast<uint64_t>(mleft.Value()) >> 32) == 0u) {
+        Emit(kSSEFloat64LoadLowWord32, g.DefineAsRegister(node), g.Use(right));
+        return;
+      }
+      opcode = kSSEFloat64InsertLowWord32;
+      break;
+    }
+    case 1:
+      opcode = kSSEFloat64InsertHighWord32;
+      break;
+    default:
+      UNREACHABLE();
+      return;
+  }
+  Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left), g.Use(right));
+}
+
+
 // static
 MachineOperatorBuilder::Flags
 InstructionSelector::SupportedMachineOperatorFlags() {