Index: src/compiler/arm/instruction-selector-arm.cc |
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc |
index e08226d5f3e44eed89f623d0882c4cf487ef24f6..5c8c7a1fd8643a5077d5e176525cff4cfd959bda 100644 |
--- a/src/compiler/arm/instruction-selector-arm.cc |
+++ b/src/compiler/arm/instruction-selector-arm.cc |
@@ -1394,6 +1394,34 @@ void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) { |
} |
+void InstructionSelector::VisitFloat64ExtractWord32(Node* node) { |
+ ArmOperandGenerator g(this); |
+ InstructionCode opcode = |
+ (OpParameter<int>(node) == 0 ? kArmVmovLowU32F64 : kArmVmovHighU32F64); |
+ Emit(opcode, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0))); |
+} |
+ |
+ |
+void InstructionSelector::VisitFloat64InsertWord32(Node* node) { |
+ ArmOperandGenerator g(this); |
+ Node* left = node->InputAt(0); |
+ Node* right = node->InputAt(1); |
+ if (left->opcode() == IrOpcode::kFloat64InsertWord32 && |
+ OpParameter<int>(left) == 1 - OpParameter<int>(node) && |
+ CanCover(node, left)) { |
+ left = left->InputAt(1); |
+ if (OpParameter<int>(node) == 0) std::swap(left, right); |
+ Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), g.UseRegister(left), |
+ g.UseRegister(right)); |
+ return; |
+ } |
+ InstructionCode opcode = |
+ (OpParameter<int>(node) == 0) ? kArmVmovLowF64U32 : kArmVmovHighF64U32; |
+ Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left), |
+ g.UseRegister(right)); |
+} |
+ |
+ |
// static |
MachineOperatorBuilder::Flags |
InstructionSelector::SupportedMachineOperatorFlags() { |