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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/v8.h" | 5 #include "src/v8.h" |
6 | 6 |
7 #if V8_TARGET_ARCH_IA32 | 7 #if V8_TARGET_ARCH_IA32 |
8 | 8 |
9 #include "src/base/bits.h" | 9 #include "src/base/bits.h" |
10 #include "src/base/division-by-constant.h" | 10 #include "src/base/division-by-constant.h" |
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2434 } else { | 2434 } else { |
2435 push(Immediate(upper)); | 2435 push(Immediate(upper)); |
2436 push(Immediate(lower)); | 2436 push(Immediate(lower)); |
2437 movsd(dst, Operand(esp, 0)); | 2437 movsd(dst, Operand(esp, 0)); |
2438 add(esp, Immediate(kDoubleSize)); | 2438 add(esp, Immediate(kDoubleSize)); |
2439 } | 2439 } |
2440 } | 2440 } |
2441 } | 2441 } |
2442 | 2442 |
2443 | 2443 |
| 2444 void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) { |
| 2445 if (imm8 == 0) { |
| 2446 movd(dst, src); |
| 2447 return; |
| 2448 } |
| 2449 DCHECK_EQ(1, imm8); |
| 2450 if (CpuFeatures::IsSupported(SSE4_1)) { |
| 2451 CpuFeatureScope sse_scope(this, SSE4_1); |
| 2452 pextrd(dst, src, imm8); |
| 2453 return; |
| 2454 } |
| 2455 pshufd(xmm0, src, 1); |
| 2456 movd(dst, src); |
| 2457 } |
| 2458 |
| 2459 |
| 2460 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { |
| 2461 DCHECK(imm8 == 0 || imm8 == 1); |
| 2462 if (CpuFeatures::IsSupported(SSE4_1)) { |
| 2463 CpuFeatureScope sse_scope(this, SSE4_1); |
| 2464 pinsrd(dst, src, imm8); |
| 2465 return; |
| 2466 } |
| 2467 movd(xmm0, src); |
| 2468 if (imm8 == 1) { |
| 2469 punpckldq(dst, xmm0); |
| 2470 } else { |
| 2471 DCHECK_EQ(0, imm8); |
| 2472 psrlq(dst, 32); |
| 2473 punpckldq(xmm0, dst); |
| 2474 movaps(dst, xmm0); |
| 2475 } |
| 2476 } |
| 2477 |
| 2478 |
2444 void MacroAssembler::SetCounter(StatsCounter* counter, int value) { | 2479 void MacroAssembler::SetCounter(StatsCounter* counter, int value) { |
2445 if (FLAG_native_code_counters && counter->Enabled()) { | 2480 if (FLAG_native_code_counters && counter->Enabled()) { |
2446 mov(Operand::StaticVariable(ExternalReference(counter)), Immediate(value)); | 2481 mov(Operand::StaticVariable(ExternalReference(counter)), Immediate(value)); |
2447 } | 2482 } |
2448 } | 2483 } |
2449 | 2484 |
2450 | 2485 |
2451 void MacroAssembler::IncrementCounter(StatsCounter* counter, int value) { | 2486 void MacroAssembler::IncrementCounter(StatsCounter* counter, int value) { |
2452 DCHECK(value > 0); | 2487 DCHECK(value > 0); |
2453 if (FLAG_native_code_counters && counter->Enabled()) { | 2488 if (FLAG_native_code_counters && counter->Enabled()) { |
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3200 if (mag.shift > 0) sar(edx, mag.shift); | 3235 if (mag.shift > 0) sar(edx, mag.shift); |
3201 mov(eax, dividend); | 3236 mov(eax, dividend); |
3202 shr(eax, 31); | 3237 shr(eax, 31); |
3203 add(edx, eax); | 3238 add(edx, eax); |
3204 } | 3239 } |
3205 | 3240 |
3206 | 3241 |
3207 } } // namespace v8::internal | 3242 } } // namespace v8::internal |
3208 | 3243 |
3209 #endif // V8_TARGET_ARCH_IA32 | 3244 #endif // V8_TARGET_ARCH_IA32 |
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