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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the TargetLoweringX8632 class, which | 10 // This file implements the TargetLoweringX8632 class, which |
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54 const struct TableFcmp_ { | 54 const struct TableFcmp_ { |
55 uint32_t Default; | 55 uint32_t Default; |
56 bool SwapScalarOperands; | 56 bool SwapScalarOperands; |
57 CondX86::BrCond C1, C2; | 57 CondX86::BrCond C1, C2; |
58 bool SwapVectorOperands; | 58 bool SwapVectorOperands; |
59 CondX86::CmppsCond Predicate; | 59 CondX86::CmppsCond Predicate; |
60 } TableFcmp[] = { | 60 } TableFcmp[] = { |
61 #define X(val, dflt, swapS, C1, C2, swapV, pred) \ | 61 #define X(val, dflt, swapS, C1, C2, swapV, pred) \ |
62 { dflt, swapS, CondX86::C1, CondX86::C2, swapV, CondX86::pred } \ | 62 { dflt, swapS, CondX86::C1, CondX86::C2, swapV, CondX86::pred } \ |
63 , | 63 , |
64 FCMPX8632_TABLE | 64 FCMPX8632_TABLE |
65 #undef X | 65 #undef X |
66 }; | 66 }; |
67 const size_t TableFcmpSize = llvm::array_lengthof(TableFcmp); | 67 const size_t TableFcmpSize = llvm::array_lengthof(TableFcmp); |
68 | 68 |
69 // The following table summarizes the logic for lowering the icmp instruction | 69 // The following table summarizes the logic for lowering the icmp instruction |
70 // for i32 and narrower types. Each icmp condition has a clear mapping to an | 70 // for i32 and narrower types. Each icmp condition has a clear mapping to an |
71 // x86 conditional branch instruction. | 71 // x86 conditional branch instruction. |
72 | 72 |
73 const struct TableIcmp32_ { | 73 const struct TableIcmp32_ { |
74 CondX86::BrCond Mapping; | 74 CondX86::BrCond Mapping; |
75 } TableIcmp32[] = { | 75 } TableIcmp32[] = { |
76 #define X(val, C_32, C1_64, C2_64, C3_64) \ | 76 #define X(val, C_32, C1_64, C2_64, C3_64) \ |
77 { CondX86::C_32 } \ | 77 { CondX86::C_32 } \ |
78 , | 78 , |
79 ICMPX8632_TABLE | 79 ICMPX8632_TABLE |
80 #undef X | 80 #undef X |
81 }; | 81 }; |
82 const size_t TableIcmp32Size = llvm::array_lengthof(TableIcmp32); | 82 const size_t TableIcmp32Size = llvm::array_lengthof(TableIcmp32); |
83 | 83 |
84 // The following table summarizes the logic for lowering the icmp instruction | 84 // The following table summarizes the logic for lowering the icmp instruction |
85 // for the i64 type. For Eq and Ne, two separate 32-bit comparisons and | 85 // for the i64 type. For Eq and Ne, two separate 32-bit comparisons and |
86 // conditional branches are needed. For the other conditions, three separate | 86 // conditional branches are needed. For the other conditions, three separate |
87 // conditional branches are needed. | 87 // conditional branches are needed. |
88 const struct TableIcmp64_ { | 88 const struct TableIcmp64_ { |
89 CondX86::BrCond C1, C2, C3; | 89 CondX86::BrCond C1, C2, C3; |
90 } TableIcmp64[] = { | 90 } TableIcmp64[] = { |
91 #define X(val, C_32, C1_64, C2_64, C3_64) \ | 91 #define X(val, C_32, C1_64, C2_64, C3_64) \ |
92 { CondX86::C1_64, CondX86::C2_64, CondX86::C3_64 } \ | 92 { CondX86::C1_64, CondX86::C2_64, CondX86::C3_64 } \ |
93 , | 93 , |
94 ICMPX8632_TABLE | 94 ICMPX8632_TABLE |
95 #undef X | 95 #undef X |
96 }; | 96 }; |
97 const size_t TableIcmp64Size = llvm::array_lengthof(TableIcmp64); | 97 const size_t TableIcmp64Size = llvm::array_lengthof(TableIcmp64); |
98 | 98 |
99 CondX86::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) { | 99 CondX86::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) { |
100 size_t Index = static_cast<size_t>(Cond); | 100 size_t Index = static_cast<size_t>(Cond); |
101 assert(Index < TableIcmp32Size); | 101 assert(Index < TableIcmp32Size); |
102 return TableIcmp32[Index].Mapping; | 102 return TableIcmp32[Index].Mapping; |
103 } | 103 } |
104 | 104 |
105 const struct TableTypeX8632Attributes_ { | 105 const struct TableTypeX8632Attributes_ { |
106 Type InVectorElementType; | 106 Type InVectorElementType; |
107 } TableTypeX8632Attributes[] = { | 107 } TableTypeX8632Attributes[] = { |
108 #define X(tag, elementty, cvt, sdss, pack, width, fld) \ | 108 #define X(tag, elementty, cvt, sdss, pack, width, fld) \ |
109 { elementty } \ | 109 { elementty } \ |
110 , | 110 , |
111 ICETYPEX8632_TABLE | 111 ICETYPEX8632_TABLE |
112 #undef X | 112 #undef X |
113 }; | 113 }; |
114 const size_t TableTypeX8632AttributesSize = | 114 const size_t TableTypeX8632AttributesSize = |
115 llvm::array_lengthof(TableTypeX8632Attributes); | 115 llvm::array_lengthof(TableTypeX8632Attributes); |
116 | 116 |
117 // Return the type which the elements of the vector have in the X86 | 117 // Return the type which the elements of the vector have in the X86 |
118 // representation of the vector. | 118 // representation of the vector. |
119 Type getInVectorElementType(Type Ty) { | 119 Type getInVectorElementType(Type Ty) { |
120 assert(isVectorType(Ty)); | 120 assert(isVectorType(Ty)); |
121 size_t Index = static_cast<size_t>(Ty); | 121 size_t Index = static_cast<size_t>(Ty); |
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4113 } | 4113 } |
4114 | 4114 |
4115 // The following pattern occurs often in lowered C and C++ code: | 4115 // The following pattern occurs often in lowered C and C++ code: |
4116 // | 4116 // |
4117 // %cmp = fcmp/icmp pred <n x ty> %src0, %src1 | 4117 // %cmp = fcmp/icmp pred <n x ty> %src0, %src1 |
4118 // %cmp.ext = sext <n x i1> %cmp to <n x ty> | 4118 // %cmp.ext = sext <n x i1> %cmp to <n x ty> |
4119 // | 4119 // |
4120 // We can eliminate the sext operation by copying the result of pcmpeqd, | 4120 // We can eliminate the sext operation by copying the result of pcmpeqd, |
4121 // pcmpgtd, or cmpps (which produce sign extended results) to the result | 4121 // pcmpgtd, or cmpps (which produce sign extended results) to the result |
4122 // of the sext operation. | 4122 // of the sext operation. |
4123 void | 4123 void TargetX8632::eliminateNextVectorSextInstruction( |
4124 TargetX8632::eliminateNextVectorSextInstruction(Variable *SignExtendedResult) { | 4124 Variable *SignExtendedResult) { |
4125 if (InstCast *NextCast = | 4125 if (InstCast *NextCast = |
4126 llvm::dyn_cast_or_null<InstCast>(Context.getNextInst())) { | 4126 llvm::dyn_cast_or_null<InstCast>(Context.getNextInst())) { |
4127 if (NextCast->getCastKind() == InstCast::Sext && | 4127 if (NextCast->getCastKind() == InstCast::Sext && |
4128 NextCast->getSrc(0) == SignExtendedResult) { | 4128 NextCast->getSrc(0) == SignExtendedResult) { |
4129 NextCast->setDeleted(); | 4129 NextCast->setDeleted(); |
4130 _movp(NextCast->getDest(), legalizeToVar(SignExtendedResult)); | 4130 _movp(NextCast->getDest(), legalizeToVar(SignExtendedResult)); |
4131 // Skip over the instruction. | 4131 // Skip over the instruction. |
4132 Context.advanceNext(); | 4132 Context.advanceNext(); |
4133 } | 4133 } |
4134 } | 4134 } |
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4788 case FT_Asm: | 4788 case FT_Asm: |
4789 case FT_Iasm: { | 4789 case FT_Iasm: { |
4790 OstreamLocker L(Ctx); | 4790 OstreamLocker L(Ctx); |
4791 emitConstantPool<PoolTypeConverter<float>>(Ctx); | 4791 emitConstantPool<PoolTypeConverter<float>>(Ctx); |
4792 emitConstantPool<PoolTypeConverter<double>>(Ctx); | 4792 emitConstantPool<PoolTypeConverter<double>>(Ctx); |
4793 } break; | 4793 } break; |
4794 } | 4794 } |
4795 } | 4795 } |
4796 | 4796 |
4797 } // end of namespace Ice | 4797 } // end of namespace Ice |
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