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Issue 974113002: Subzero: Rerun clang-format after LLVM 3.6 merge. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 9 months ago
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1 //===- subzero/src/IceIntrinsics.cpp - Functions related to intrinsics ----===// 1 //===- subzero/src/IceIntrinsics.cpp - Functions related to intrinsics ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the Intrinsics utilities for matching and 10 // This file implements the Intrinsics utilities for matching and
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after
44 INTRIN(AtomicCmpxchg, SideEffects_T, ReturnsTwice_F), {Overload, \ 44 INTRIN(AtomicCmpxchg, SideEffects_T, ReturnsTwice_F), {Overload, \
45 IceType_i32, \ 45 IceType_i32, \
46 Overload, \ 46 Overload, \
47 Overload, \ 47 Overload, \
48 IceType_i32, \ 48 IceType_i32, \
49 IceType_i32}, \ 49 IceType_i32}, \
50 6 \ 50 6 \
51 } \ 51 } \
52 , "nacl.atomic.cmpxchg." NameSuffix \ 52 , "nacl.atomic.cmpxchg." NameSuffix \
53 } 53 }
54 AtomicCmpxchgInit(IceType_i8, "i8"), 54 AtomicCmpxchgInit(IceType_i8, "i8"),
55 AtomicCmpxchgInit(IceType_i16, "i16"), 55 AtomicCmpxchgInit(IceType_i16, "i16"),
56 AtomicCmpxchgInit(IceType_i32, "i32"), 56 AtomicCmpxchgInit(IceType_i32, "i32"),
57 AtomicCmpxchgInit(IceType_i64, "i64"), 57 AtomicCmpxchgInit(IceType_i64, "i64"),
58 #undef AtomicCmpxchgInit 58 #undef AtomicCmpxchgInit
59 59
60 {{INTRIN(AtomicFence, SideEffects_T, ReturnsTwice_F), 60 {{INTRIN(AtomicFence, SideEffects_T, ReturnsTwice_F),
61 {IceType_void, IceType_i32}, 61 {IceType_void, IceType_i32},
62 2}, 62 2},
63 "nacl.atomic.fence"}, 63 "nacl.atomic.fence"},
64 {{INTRIN(AtomicFenceAll, SideEffects_T, ReturnsTwice_F), 64 {{INTRIN(AtomicFenceAll, SideEffects_T, ReturnsTwice_F), {IceType_void}, 1},
65 {IceType_void}, 65 "nacl.atomic.fence.all"},
66 1}, 66 {{INTRIN(AtomicIsLockFree, SideEffects_F, ReturnsTwice_F),
67 "nacl.atomic.fence.all"}, 67 {IceType_i1, IceType_i32, IceType_i32},
68 {{INTRIN(AtomicIsLockFree, SideEffects_F, ReturnsTwice_F), 68 3},
69 {IceType_i1, IceType_i32, IceType_i32}, 69 "nacl.atomic.is.lock.free"},
70 3},
71 "nacl.atomic.is.lock.free"},
72 70
73 #define AtomicLoadInit(Overload, NameSuffix) \ 71 #define AtomicLoadInit(Overload, NameSuffix) \
74 { \ 72 { \
75 { \ 73 { \
76 INTRIN(AtomicLoad, SideEffects_T, ReturnsTwice_F), \ 74 INTRIN(AtomicLoad, SideEffects_T, ReturnsTwice_F), \
77 {Overload, IceType_i32, IceType_i32}, 3 \ 75 {Overload, IceType_i32, IceType_i32}, 3 \
78 } \ 76 } \
79 , "nacl.atomic.load." NameSuffix \ 77 , "nacl.atomic.load." NameSuffix \
80 } 78 }
81 AtomicLoadInit(IceType_i8, "i8"), 79 AtomicLoadInit(IceType_i8, "i8"),
82 AtomicLoadInit(IceType_i16, "i16"), 80 AtomicLoadInit(IceType_i16, "i16"),
83 AtomicLoadInit(IceType_i32, "i32"), 81 AtomicLoadInit(IceType_i32, "i32"),
84 AtomicLoadInit(IceType_i64, "i64"), 82 AtomicLoadInit(IceType_i64, "i64"),
85 #undef AtomicLoadInit 83 #undef AtomicLoadInit
86 84
87 #define AtomicRMWInit(Overload, NameSuffix) \ 85 #define AtomicRMWInit(Overload, NameSuffix) \
88 { \ 86 { \
89 { \ 87 { \
90 INTRIN(AtomicRMW, SideEffects_T, ReturnsTwice_F) \ 88 INTRIN(AtomicRMW, SideEffects_T, ReturnsTwice_F) \
91 , {Overload, IceType_i32, IceType_i32, Overload, IceType_i32}, 5 \ 89 , {Overload, IceType_i32, IceType_i32, Overload, IceType_i32}, 5 \
92 } \ 90 } \
93 , "nacl.atomic.rmw." NameSuffix \ 91 , "nacl.atomic.rmw." NameSuffix \
94 } 92 }
95 AtomicRMWInit(IceType_i8, "i8"), 93 AtomicRMWInit(IceType_i8, "i8"),
96 AtomicRMWInit(IceType_i16, "i16"), 94 AtomicRMWInit(IceType_i16, "i16"),
97 AtomicRMWInit(IceType_i32, "i32"), 95 AtomicRMWInit(IceType_i32, "i32"),
98 AtomicRMWInit(IceType_i64, "i64"), 96 AtomicRMWInit(IceType_i64, "i64"),
99 #undef AtomicRMWInit 97 #undef AtomicRMWInit
100 98
101 #define AtomicStoreInit(Overload, NameSuffix) \ 99 #define AtomicStoreInit(Overload, NameSuffix) \
102 { \ 100 { \
103 { \ 101 { \
104 INTRIN(AtomicStore, SideEffects_T, ReturnsTwice_F) \ 102 INTRIN(AtomicStore, SideEffects_T, ReturnsTwice_F) \
105 , {IceType_void, Overload, IceType_i32, IceType_i32}, 4 \ 103 , {IceType_void, Overload, IceType_i32, IceType_i32}, 4 \
106 } \ 104 } \
107 , "nacl.atomic.store." NameSuffix \ 105 , "nacl.atomic.store." NameSuffix \
108 } 106 }
109 AtomicStoreInit(IceType_i8, "i8"), 107 AtomicStoreInit(IceType_i8, "i8"),
110 AtomicStoreInit(IceType_i16, "i16"), 108 AtomicStoreInit(IceType_i16, "i16"),
111 AtomicStoreInit(IceType_i32, "i32"), 109 AtomicStoreInit(IceType_i32, "i32"),
112 AtomicStoreInit(IceType_i64, "i64"), 110 AtomicStoreInit(IceType_i64, "i64"),
113 #undef AtomicStoreInit 111 #undef AtomicStoreInit
114 112
115 #define BswapInit(Overload, NameSuffix) \ 113 #define BswapInit(Overload, NameSuffix) \
116 { \ 114 { \
117 { \ 115 { \
118 INTRIN(Bswap, SideEffects_F, ReturnsTwice_F) \ 116 INTRIN(Bswap, SideEffects_F, ReturnsTwice_F) \
119 , {Overload, Overload}, 2 \ 117 , {Overload, Overload}, 2 \
120 } \ 118 } \
121 , "bswap." NameSuffix \ 119 , "bswap." NameSuffix \
122 } 120 }
123 BswapInit(IceType_i16, "i16"), 121 BswapInit(IceType_i16, "i16"),
124 BswapInit(IceType_i32, "i32"), 122 BswapInit(IceType_i32, "i32"),
125 BswapInit(IceType_i64, "i64"), 123 BswapInit(IceType_i64, "i64"),
126 #undef BswapInit 124 #undef BswapInit
127 125
128 #define CtlzInit(Overload, NameSuffix) \ 126 #define CtlzInit(Overload, NameSuffix) \
129 { \ 127 { \
130 { \ 128 { \
131 INTRIN(Ctlz, SideEffects_F, ReturnsTwice_F) \ 129 INTRIN(Ctlz, SideEffects_F, ReturnsTwice_F) \
132 , {Overload, Overload, IceType_i1}, 3 \ 130 , {Overload, Overload, IceType_i1}, 3 \
133 } \ 131 } \
134 , "ctlz." NameSuffix \ 132 , "ctlz." NameSuffix \
135 } 133 }
136 CtlzInit(IceType_i32, "i32"), 134 CtlzInit(IceType_i32, "i32"),
137 CtlzInit(IceType_i64, "i64"), 135 CtlzInit(IceType_i64, "i64"),
138 #undef CtlzInit 136 #undef CtlzInit
139 137
140 #define CtpopInit(Overload, NameSuffix) \ 138 #define CtpopInit(Overload, NameSuffix) \
141 { \ 139 { \
142 { \ 140 { \
143 INTRIN(Ctpop, SideEffects_F, ReturnsTwice_F) \ 141 INTRIN(Ctpop, SideEffects_F, ReturnsTwice_F) \
144 , {Overload, Overload}, 2 \ 142 , {Overload, Overload}, 2 \
145 } \ 143 } \
146 , "ctpop." NameSuffix \ 144 , "ctpop." NameSuffix \
147 } 145 }
148 CtpopInit(IceType_i32, "i32"), 146 CtpopInit(IceType_i32, "i32"),
149 CtpopInit(IceType_i64, "i64"), 147 CtpopInit(IceType_i64, "i64"),
150 #undef CtpopInit 148 #undef CtpopInit
151 149
152 #define CttzInit(Overload, NameSuffix) \ 150 #define CttzInit(Overload, NameSuffix) \
153 { \ 151 { \
154 { \ 152 { \
155 INTRIN(Cttz, SideEffects_F, ReturnsTwice_F) \ 153 INTRIN(Cttz, SideEffects_F, ReturnsTwice_F) \
156 , {Overload, Overload, IceType_i1}, 3 \ 154 , {Overload, Overload, IceType_i1}, 3 \
157 } \ 155 } \
158 , "cttz." NameSuffix \ 156 , "cttz." NameSuffix \
159 } 157 }
160 CttzInit(IceType_i32, "i32"), 158 CttzInit(IceType_i32, "i32"),
161 CttzInit(IceType_i64, "i64"), 159 CttzInit(IceType_i64, "i64"),
162 #undef CttzInit 160 #undef CttzInit
163 161
164 {{INTRIN(Longjmp, SideEffects_T, ReturnsTwice_F), 162 {{INTRIN(Longjmp, SideEffects_T, ReturnsTwice_F),
165 {IceType_void, IceType_i32, IceType_i32}, 163 {IceType_void, IceType_i32, IceType_i32},
166 3}, 164 3},
167 "nacl.longjmp"}, 165 "nacl.longjmp"},
168 {{INTRIN(Memcpy, SideEffects_T, ReturnsTwice_F), 166 {{INTRIN(Memcpy, SideEffects_T, ReturnsTwice_F),
169 {IceType_void, IceType_i32, IceType_i32, IceType_i32, IceType_i32, 167 {IceType_void, IceType_i32, IceType_i32, IceType_i32, IceType_i32,
170 IceType_i1}, 168 IceType_i1},
171 6}, 169 6},
172 "memcpy.p0i8.p0i8.i32"}, 170 "memcpy.p0i8.p0i8.i32"},
173 {{INTRIN(Memmove, SideEffects_T, ReturnsTwice_F), 171 {{INTRIN(Memmove, SideEffects_T, ReturnsTwice_F),
174 {IceType_void, IceType_i32, IceType_i32, IceType_i32, IceType_i32, 172 {IceType_void, IceType_i32, IceType_i32, IceType_i32, IceType_i32,
175 IceType_i1}, 173 IceType_i1},
176 6}, 174 6},
177 "memmove.p0i8.p0i8.i32"}, 175 "memmove.p0i8.p0i8.i32"},
178 {{INTRIN(Memset, SideEffects_T, ReturnsTwice_F), 176 {{INTRIN(Memset, SideEffects_T, ReturnsTwice_F),
179 {IceType_void, IceType_i32, IceType_i8, IceType_i32, IceType_i32, 177 {IceType_void, IceType_i32, IceType_i8, IceType_i32, IceType_i32,
180 IceType_i1}, 178 IceType_i1},
181 6}, 179 6},
182 "memset.p0i8.i32"}, 180 "memset.p0i8.i32"},
183 {{INTRIN(NaClReadTP, SideEffects_F, ReturnsTwice_F), {IceType_i32}, 1}, 181 {{INTRIN(NaClReadTP, SideEffects_F, ReturnsTwice_F), {IceType_i32}, 1},
184 "nacl.read.tp"}, 182 "nacl.read.tp"},
185 {{INTRIN(Setjmp, SideEffects_T, ReturnsTwice_T), 183 {{INTRIN(Setjmp, SideEffects_T, ReturnsTwice_T),
186 {IceType_i32, IceType_i32}, 184 {IceType_i32, IceType_i32},
187 2}, 185 2},
188 "nacl.setjmp"}, 186 "nacl.setjmp"},
189 187
190 #define SqrtInit(Overload, NameSuffix) \ 188 #define SqrtInit(Overload, NameSuffix) \
191 { \ 189 { \
192 { INTRIN(Sqrt, SideEffects_F, ReturnsTwice_F), {Overload, Overload}, 2 } \ 190 { INTRIN(Sqrt, SideEffects_F, ReturnsTwice_F), {Overload, Overload}, 2 } \
193 , "sqrt." NameSuffix \ 191 , "sqrt." NameSuffix \
194 } 192 }
195 SqrtInit(IceType_f32, "f32"), 193 SqrtInit(IceType_f32, "f32"),
196 SqrtInit(IceType_f64, "f64"), 194 SqrtInit(IceType_f64, "f64"),
197 #undef SqrtInit 195 #undef SqrtInit
198 196
199 {{INTRIN(Stacksave, SideEffects_T, ReturnsTwice_F), {IceType_i32}, 1}, 197 {{INTRIN(Stacksave, SideEffects_T, ReturnsTwice_F), {IceType_i32}, 1},
200 "stacksave"}, 198 "stacksave"},
201 {{INTRIN(Stackrestore, SideEffects_T, ReturnsTwice_F), 199 {{INTRIN(Stackrestore, SideEffects_T, ReturnsTwice_F),
202 {IceType_void, IceType_i32}, 200 {IceType_void, IceType_i32},
203 2}, 201 2},
204 "stackrestore"}, 202 "stackrestore"},
205 {{INTRIN(Trap, SideEffects_T, ReturnsTwice_F), {IceType_void}, 1}, 203 {{INTRIN(Trap, SideEffects_T, ReturnsTwice_F), {IceType_void}, 1}, "trap"}};
206 "trap"}};
207 const size_t IceIntrinsicsTableSize = llvm::array_lengthof(IceIntrinsicsTable); 204 const size_t IceIntrinsicsTableSize = llvm::array_lengthof(IceIntrinsicsTable);
208 205
209 #undef INTRIN 206 #undef INTRIN
210 207
211 } // end of anonymous namespace 208 } // end of anonymous namespace
212 209
213 Intrinsics::Intrinsics() { 210 Intrinsics::Intrinsics() {
214 for (size_t I = 0; I < IceIntrinsicsTableSize; ++I) { 211 for (size_t I = 0; I < IceIntrinsicsTableSize; ++I) {
215 const struct IceIntrinsicsEntry_ &Entry = IceIntrinsicsTable[I]; 212 const struct IceIntrinsicsEntry_ &Entry = IceIntrinsicsTable[I];
216 assert(Entry.Info.NumTypes <= kMaxIntrinsicParameters); 213 assert(Entry.Info.NumTypes <= kMaxIntrinsicParameters);
(...skipping 47 matching lines...) Expand 10 before | Expand all | Expand 10 after
264 return Intrinsics::IsValidCall; 261 return Intrinsics::IsValidCall;
265 } 262 }
266 263
267 Type Intrinsics::FullIntrinsicInfo::getArgType(SizeT Index) const { 264 Type Intrinsics::FullIntrinsicInfo::getArgType(SizeT Index) const {
268 assert(NumTypes > 1); 265 assert(NumTypes > 1);
269 assert(Index + 1 < NumTypes); 266 assert(Index + 1 < NumTypes);
270 return Signature[Index + 1]; 267 return Signature[Index + 1];
271 } 268 }
272 269
273 } // end of namespace Ice 270 } // end of namespace Ice
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