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1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// | 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the InstX8632 and OperandX8632 classes, | 10 // This file implements the InstX8632 and OperandX8632 classes, |
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27 namespace { | 27 namespace { |
28 | 28 |
29 const struct InstX8632BrAttributes_ { | 29 const struct InstX8632BrAttributes_ { |
30 CondX86::BrCond Opposite; | 30 CondX86::BrCond Opposite; |
31 const char *DisplayString; | 31 const char *DisplayString; |
32 const char *EmitString; | 32 const char *EmitString; |
33 } InstX8632BrAttributes[] = { | 33 } InstX8632BrAttributes[] = { |
34 #define X(tag, encode, opp, dump, emit) \ | 34 #define X(tag, encode, opp, dump, emit) \ |
35 { CondX86::opp, dump, emit } \ | 35 { CondX86::opp, dump, emit } \ |
36 , | 36 , |
37 ICEINSTX8632BR_TABLE | 37 ICEINSTX8632BR_TABLE |
38 #undef X | 38 #undef X |
39 }; | 39 }; |
40 | 40 |
41 const struct InstX8632CmppsAttributes_ { | 41 const struct InstX8632CmppsAttributes_ { |
42 const char *EmitString; | 42 const char *EmitString; |
43 } InstX8632CmppsAttributes[] = { | 43 } InstX8632CmppsAttributes[] = { |
44 #define X(tag, emit) \ | 44 #define X(tag, emit) \ |
45 { emit } \ | 45 { emit } \ |
46 , | 46 , |
47 ICEINSTX8632CMPPS_TABLE | 47 ICEINSTX8632CMPPS_TABLE |
48 #undef X | 48 #undef X |
49 }; | 49 }; |
50 | 50 |
51 const struct TypeX8632Attributes_ { | 51 const struct TypeX8632Attributes_ { |
52 const char *CvtString; // i (integer), s (single FP), d (double FP) | 52 const char *CvtString; // i (integer), s (single FP), d (double FP) |
53 const char *SdSsString; // ss, sd, or <blank> | 53 const char *SdSsString; // ss, sd, or <blank> |
54 const char *PackString; // b, w, d, or <blank> | 54 const char *PackString; // b, w, d, or <blank> |
55 const char *WidthString; // b, w, l, q, or <blank> | 55 const char *WidthString; // b, w, l, q, or <blank> |
56 const char *FldString; // s, l, or <blank> | 56 const char *FldString; // s, l, or <blank> |
57 } TypeX8632Attributes[] = { | 57 } TypeX8632Attributes[] = { |
58 #define X(tag, elementty, cvt, sdss, pack, width, fld) \ | 58 #define X(tag, elementty, cvt, sdss, pack, width, fld) \ |
59 { cvt, sdss, pack, width, fld } \ | 59 { cvt, sdss, pack, width, fld } \ |
60 , | 60 , |
61 ICETYPEX8632_TABLE | 61 ICETYPEX8632_TABLE |
62 #undef X | 62 #undef X |
63 }; | 63 }; |
64 | 64 |
65 const char *InstX8632SegmentRegNames[] = { | 65 const char *InstX8632SegmentRegNames[] = { |
66 #define X(val, name, prefix) name, | 66 #define X(val, name, prefix) name, |
67 SEG_REGX8632_TABLE | 67 SEG_REGX8632_TABLE |
68 #undef X | 68 #undef X |
69 }; | 69 }; |
70 | 70 |
71 uint8_t InstX8632SegmentPrefixes[] = { | 71 uint8_t InstX8632SegmentPrefixes[] = { |
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1249 Ostream &Str = Func->getContext()->getStrEmit(); | 1249 Ostream &Str = Func->getContext()->getStrEmit(); |
1250 assert(Inst->getSrcSize() == 3); | 1250 assert(Inst->getSrcSize() == 3); |
1251 assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() == | 1251 assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() == |
1252 RegX8632::Reg_xmm0); | 1252 RegX8632::Reg_xmm0); |
1253 Str << "\t" << Opcode << "\t"; | 1253 Str << "\t" << Opcode << "\t"; |
1254 Inst->getSrc(1)->emit(Func); | 1254 Inst->getSrc(1)->emit(Func); |
1255 Str << ", "; | 1255 Str << ", "; |
1256 Inst->getDest()->emit(Func); | 1256 Inst->getDest()->emit(Func); |
1257 } | 1257 } |
1258 | 1258 |
1259 void | 1259 void emitIASVariableBlendInst( |
1260 emitIASVariableBlendInst(const Inst *Inst, const Cfg *Func, | 1260 const Inst *Inst, const Cfg *Func, |
1261 const x86::AssemblerX86::XmmEmitterRegOp &Emitter) { | 1261 const x86::AssemblerX86::XmmEmitterRegOp &Emitter) { |
1262 assert(Inst->getSrcSize() == 3); | 1262 assert(Inst->getSrcSize() == 3); |
1263 assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() == | 1263 assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() == |
1264 RegX8632::Reg_xmm0); | 1264 RegX8632::Reg_xmm0); |
1265 const Variable *Dest = Inst->getDest(); | 1265 const Variable *Dest = Inst->getDest(); |
1266 const Operand *Src = Inst->getSrc(1); | 1266 const Operand *Src = Inst->getSrc(1); |
1267 emitIASRegOpTyXMM(Func, Dest->getType(), Dest, Src, Emitter); | 1267 emitIASRegOpTyXMM(Func, Dest->getType(), Dest, Src, Emitter); |
1268 } | 1268 } |
1269 | 1269 |
1270 } // end anonymous namespace | 1270 } // end anonymous namespace |
1271 | 1271 |
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2936 } | 2936 } |
2937 Str << "("; | 2937 Str << "("; |
2938 if (Func) | 2938 if (Func) |
2939 Var->dump(Func); | 2939 Var->dump(Func); |
2940 else | 2940 else |
2941 Var->dump(Str); | 2941 Var->dump(Str); |
2942 Str << ")"; | 2942 Str << ")"; |
2943 } | 2943 } |
2944 | 2944 |
2945 } // end of namespace Ice | 2945 } // end of namespace Ice |
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