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1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// | 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the InstX8632 and OperandX8632 classes, | 10 // This file implements the InstX8632 and OperandX8632 classes, |
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1633 assert(getSrcSize() == 3); | 1633 assert(getSrcSize() == 3); |
1634 x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>(); | 1634 x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>(); |
1635 Type Ty = getSrc(0)->getType(); | 1635 Type Ty = getSrc(0)->getType(); |
1636 const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0)); | 1636 const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0)); |
1637 assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment); | 1637 assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment); |
1638 const x86::Address Addr = Mem->toAsmAddress(Asm); | 1638 const x86::Address Addr = Mem->toAsmAddress(Asm); |
1639 const auto VarReg = llvm::cast<Variable>(getSrc(2)); | 1639 const auto VarReg = llvm::cast<Variable>(getSrc(2)); |
1640 assert(VarReg->hasReg()); | 1640 assert(VarReg->hasReg()); |
1641 const RegX8632::GPRRegister Reg = | 1641 const RegX8632::GPRRegister Reg = |
1642 RegX8632::getEncodedGPR(VarReg->getRegNum()); | 1642 RegX8632::getEncodedGPR(VarReg->getRegNum()); |
1643 if (Locked) { | 1643 Asm->cmpxchg(Ty, Addr, Reg, Locked); |
1644 Asm->LockCmpxchg(Ty, Addr, Reg); | |
1645 } else { | |
1646 Asm->cmpxchg(Ty, Addr, Reg); | |
1647 } | |
1648 } | 1644 } |
1649 | 1645 |
1650 void InstX8632Cmpxchg::dump(const Cfg *Func) const { | 1646 void InstX8632Cmpxchg::dump(const Cfg *Func) const { |
1651 if (!ALLOW_DUMP) | 1647 if (!ALLOW_DUMP) |
1652 return; | 1648 return; |
1653 Ostream &Str = Func->getContext()->getStrDump(); | 1649 Ostream &Str = Func->getContext()->getStrDump(); |
1654 if (Locked) { | 1650 if (Locked) { |
1655 Str << "lock "; | 1651 Str << "lock "; |
1656 } | 1652 } |
1657 Str << "cmpxchg." << getSrc(0)->getType() << " "; | 1653 Str << "cmpxchg." << getSrc(0)->getType() << " "; |
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1669 Str << "\tcmpxchg8b\t"; | 1665 Str << "\tcmpxchg8b\t"; |
1670 getSrc(0)->emit(Func); | 1666 getSrc(0)->emit(Func); |
1671 } | 1667 } |
1672 | 1668 |
1673 void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const { | 1669 void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const { |
1674 assert(getSrcSize() == 5); | 1670 assert(getSrcSize() == 5); |
1675 x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>(); | 1671 x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>(); |
1676 const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0)); | 1672 const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0)); |
1677 assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment); | 1673 assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment); |
1678 const x86::Address Addr = Mem->toAsmAddress(Asm); | 1674 const x86::Address Addr = Mem->toAsmAddress(Asm); |
1679 if (Locked) { | 1675 Asm->cmpxchg8b(Addr, Locked); |
1680 Asm->lock(); | |
1681 } | |
1682 Asm->cmpxchg8b(Addr); | |
1683 } | 1676 } |
1684 | 1677 |
1685 void InstX8632Cmpxchg8b::dump(const Cfg *Func) const { | 1678 void InstX8632Cmpxchg8b::dump(const Cfg *Func) const { |
1686 if (!ALLOW_DUMP) | 1679 if (!ALLOW_DUMP) |
1687 return; | 1680 return; |
1688 Ostream &Str = Func->getContext()->getStrDump(); | 1681 Ostream &Str = Func->getContext()->getStrDump(); |
1689 if (Locked) { | 1682 if (Locked) { |
1690 Str << "lock "; | 1683 Str << "lock "; |
1691 } | 1684 } |
1692 Str << "cmpxchg8b "; | 1685 Str << "cmpxchg8b "; |
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2724 assert(getSrcSize() == 2); | 2717 assert(getSrcSize() == 2); |
2725 x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>(); | 2718 x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>(); |
2726 Type Ty = getSrc(0)->getType(); | 2719 Type Ty = getSrc(0)->getType(); |
2727 const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0)); | 2720 const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0)); |
2728 assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment); | 2721 assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment); |
2729 const x86::Address Addr = Mem->toAsmAddress(Asm); | 2722 const x86::Address Addr = Mem->toAsmAddress(Asm); |
2730 const auto VarReg = llvm::cast<Variable>(getSrc(1)); | 2723 const auto VarReg = llvm::cast<Variable>(getSrc(1)); |
2731 assert(VarReg->hasReg()); | 2724 assert(VarReg->hasReg()); |
2732 const RegX8632::GPRRegister Reg = | 2725 const RegX8632::GPRRegister Reg = |
2733 RegX8632::getEncodedGPR(VarReg->getRegNum()); | 2726 RegX8632::getEncodedGPR(VarReg->getRegNum()); |
2734 if (Locked) { | 2727 Asm->xadd(Ty, Addr, Reg, Locked); |
2735 Asm->lock(); | |
2736 } | |
2737 Asm->xadd(Ty, Addr, Reg); | |
2738 } | 2728 } |
2739 | 2729 |
2740 void InstX8632Xadd::dump(const Cfg *Func) const { | 2730 void InstX8632Xadd::dump(const Cfg *Func) const { |
2741 if (!ALLOW_DUMP) | 2731 if (!ALLOW_DUMP) |
2742 return; | 2732 return; |
2743 Ostream &Str = Func->getContext()->getStrDump(); | 2733 Ostream &Str = Func->getContext()->getStrDump(); |
2744 if (Locked) { | 2734 if (Locked) { |
2745 Str << "lock "; | 2735 Str << "lock "; |
2746 } | 2736 } |
2747 Type Ty = getSrc(0)->getType(); | 2737 Type Ty = getSrc(0)->getType(); |
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2946 } | 2936 } |
2947 Str << "("; | 2937 Str << "("; |
2948 if (Func) | 2938 if (Func) |
2949 Var->dump(Func); | 2939 Var->dump(Func); |
2950 else | 2940 else |
2951 Var->dump(Str); | 2941 Var->dump(Str); |
2952 Str << ")"; | 2942 Str << ")"; |
2953 } | 2943 } |
2954 | 2944 |
2955 } // end of namespace Ice | 2945 } // end of namespace Ice |
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