| OLD | NEW |
| 1 target triple = "i686-pc-linux-gnu" | |
| 2 | |
| 3 define <4 x float> @_Z6selectDv4_iDv4_fS0_(<4 x i32> %cond.ext, <4 x float> %arg
1, <4 x float> %arg2) { | 1 define <4 x float> @_Z6selectDv4_iDv4_fS0_(<4 x i32> %cond.ext, <4 x float> %arg
1, <4 x float> %arg2) { |
| 4 entry: | 2 entry: |
| 5 %cond = trunc <4 x i32> %cond.ext to <4 x i1> | 3 %cond = trunc <4 x i32> %cond.ext to <4 x i1> |
| 6 %res = select <4 x i1> %cond, <4 x float> %arg1, <4 x float> %arg2 | 4 %res = select <4 x i1> %cond, <4 x float> %arg1, <4 x float> %arg2 |
| 7 ret <4 x float> %res | 5 ret <4 x float> %res |
| 8 } | 6 } |
| 9 | 7 |
| 10 define <4 x i32> @_Z6selectDv4_iS_S_(<4 x i32> %cond.ext, <4 x i32> %arg1, <4 x
i32> %arg2) { | 8 define <4 x i32> @_Z6selectDv4_iS_S_(<4 x i32> %cond.ext, <4 x i32> %arg1, <4 x
i32> %arg2) { |
| 11 entry: | 9 entry: |
| 12 %cond = trunc <4 x i32> %cond.ext to <4 x i1> | 10 %cond = trunc <4 x i32> %cond.ext to <4 x i1> |
| (...skipping 58 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 71 | 69 |
| 72 define <16 x i8> @_Z9select_i1Dv16_aS_S_(<16 x i8> %cond.ext, <16 x i8> %arg1.ex
t, <16 x i8> %arg2.ext) { | 70 define <16 x i8> @_Z9select_i1Dv16_aS_S_(<16 x i8> %cond.ext, <16 x i8> %arg1.ex
t, <16 x i8> %arg2.ext) { |
| 73 entry: | 71 entry: |
| 74 %cond = trunc <16 x i8> %cond.ext to <16 x i1> | 72 %cond = trunc <16 x i8> %cond.ext to <16 x i1> |
| 75 %arg1 = trunc <16 x i8> %arg1.ext to <16 x i1> | 73 %arg1 = trunc <16 x i8> %arg1.ext to <16 x i1> |
| 76 %arg2 = trunc <16 x i8> %arg2.ext to <16 x i1> | 74 %arg2 = trunc <16 x i8> %arg2.ext to <16 x i1> |
| 77 %res.trunc = select <16 x i1> %cond, <16 x i1> %arg1, <16 x i1> %arg2 | 75 %res.trunc = select <16 x i1> %cond, <16 x i1> %arg1, <16 x i1> %arg2 |
| 78 %res = sext <16 x i1> %res.trunc to <16 x i8> | 76 %res = sext <16 x i1> %res.trunc to <16 x i8> |
| 79 ret <16 x i8> %res | 77 ret <16 x i8> %res |
| 80 } | 78 } |
| OLD | NEW |