Subzero: Run sandboxed cross tests, and do some cleanup.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 16 matching lines @@
 namespace {
 
 const struct InstX8632BrAttributes_ {
   CondX86::BrCond Opposite;
   const char *DisplayString;
   const char *EmitString;
 } InstX8632BrAttributes[] = {
 #define X(tag, encode, opp, dump, emit)                                        \
   { CondX86::opp, dump, emit }                                                 \
   ,
-      ICEINSTX8632BR_TABLE
+    ICEINSTX8632BR_TABLE
 #undef X
 };
 
 const struct InstX8632CmppsAttributes_ {
   const char *EmitString;
 } InstX8632CmppsAttributes[] = {
 #define X(tag, emit)                                                           \
   { emit }                                                                     \
   ,
-      ICEINSTX8632CMPPS_TABLE
+    ICEINSTX8632CMPPS_TABLE
 #undef X
 };
 
 const struct TypeX8632Attributes_ {
   const char *CvtString;   // i (integer), s (single FP), d (double FP)
   const char *SdSsString;  // ss, sd, or <blank>
   const char *PackString;  // b, w, d, or <blank>
   const char *WidthString; // b, w, l, q, or <blank>
   const char *FldString;   // s, l, or <blank>
 } TypeX8632Attributes[] = {
 #define X(tag, elementty, cvt, sdss, pack, width, fld)                         \
   { cvt, sdss, pack, width, fld }                                              \
   ,
-      ICETYPEX8632_TABLE
+    ICETYPEX8632_TABLE
 #undef X
 };
 
 const char *InstX8632SegmentRegNames[] = {
 #define X(val, name, prefix) name,
     SEG_REGX8632_TABLE
 #undef X
 };
 
 uint8_t InstX8632SegmentPrefixes[] = {
@@ skipping 1177 matching lines @@
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(Inst->getSrcSize() == 3);
   assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
          RegX8632::Reg_xmm0);
   Str << "\t" << Opcode << "\t";
   Inst->getSrc(1)->emit(Func);
   Str << ", ";
   Inst->getDest()->emit(Func);
 }
 
-void
-emitIASVariableBlendInst(const Inst *Inst, const Cfg *Func,
-                         const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
+void emitIASVariableBlendInst(
+    const Inst *Inst, const Cfg *Func,
+    const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
   assert(Inst->getSrcSize() == 3);
   assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
          RegX8632::Reg_xmm0);
   const Variable *Dest = Inst->getDest();
   const Operand *Src = Inst->getSrc(1);
   emitIASRegOpTyXMM(Func, Dest->getType(), Dest, Src, Emitter);
 }
 
 } // end anonymous namespace
 
@@ skipping 361 matching lines @@
   assert(getSrcSize() == 3);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Type Ty = getSrc(0)->getType();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   const auto VarReg = llvm::cast<Variable>(getSrc(2));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
-  if (Locked) {
-    Asm->LockCmpxchg(Ty, Addr, Reg);
-  } else {
-    Asm->cmpxchg(Ty, Addr, Reg);
-  }
+  Asm->cmpxchg(Ty, Addr, Reg, Locked);
 }
 
 void InstX8632Cmpxchg::dump(const Cfg *Func) const {
   if (!ALLOW_DUMP)
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Str << "cmpxchg." << getSrc(0)->getType() << " ";
@@ skipping 11 matching lines @@
   Str << "\tcmpxchg8b\t";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 5);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
-  if (Locked) {
-    Asm->lock();
-  }
-  Asm->cmpxchg8b(Addr);
+  Asm->cmpxchg8b(Addr, Locked);
 }
 
 void InstX8632Cmpxchg8b::dump(const Cfg *Func) const {
   if (!ALLOW_DUMP)
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Str << "cmpxchg8b ";
@@ skipping 1031 matching lines @@
   assert(getSrcSize() == 2);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Type Ty = getSrc(0)->getType();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   const auto VarReg = llvm::cast<Variable>(getSrc(1));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
-  if (Locked) {
-    Asm->lock();
-  }
-  Asm->xadd(Ty, Addr, Reg);
+  Asm->xadd(Ty, Addr, Reg, Locked);
 }
 
 void InstX8632Xadd::dump(const Cfg *Func) const {
   if (!ALLOW_DUMP)
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Type Ty = getSrc(0)->getType();
@@ skipping 198 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice