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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 204 case ge: | 204 case ge: |
| 205 return le; | 205 return le; |
| 206 case le: | 206 case le: |
| 207 return ge; | 207 return ge; |
| 208 default: | 208 default: |
| 209 return cc; | 209 return cc; |
| 210 }; | 210 }; |
| 211 } | 211 } |
| 212 | 212 |
| 213 | 213 |
| 214 // Branch hints are not used on the ARM. They are defined so that they can |
| 215 // appear in shared function signatures, but will be ignored in ARM |
| 216 // implementations. |
| 217 enum Hint { no_hint }; |
| 218 |
| 219 |
| 214 // The pc store offset may be 8 or 12 depending on the processor implementation. | 220 // The pc store offset may be 8 or 12 depending on the processor implementation. |
| 215 int PcStoreOffset(); | 221 int PcStoreOffset(); |
| 216 | 222 |
| 217 | 223 |
| 218 // ----------------------------------------------------------------------------- | 224 // ----------------------------------------------------------------------------- |
| 219 // Addressing modes and instruction variants | 225 // Addressing modes and instruction variants |
| 220 | 226 |
| 221 // Shifter operand shift operation | 227 // Shifter operand shift operation |
| 222 enum ShiftOp { | 228 enum ShiftOp { |
| 223 LSL = 0 << 5, | 229 LSL = 0 << 5, |
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| 775 | 781 |
| 776 // Block the emission of the constant pool before pc_offset | 782 // Block the emission of the constant pool before pc_offset |
| 777 void BlockConstPoolBefore(int pc_offset) { | 783 void BlockConstPoolBefore(int pc_offset) { |
| 778 if (no_const_pool_before_ < pc_offset) no_const_pool_before_ = pc_offset; | 784 if (no_const_pool_before_ < pc_offset) no_const_pool_before_ = pc_offset; |
| 779 } | 785 } |
| 780 }; | 786 }; |
| 781 | 787 |
| 782 } } // namespace v8::internal | 788 } } // namespace v8::internal |
| 783 | 789 |
| 784 #endif // V8_ASSEMBLER_ARM_H_ | 790 #endif // V8_ASSEMBLER_ARM_H_ |
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