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| 2 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 2 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 3 // All Rights Reserved. | 3 // All Rights Reserved. |
| 4 // | 4 // |
| 5 // Redistribution and use in source and binary forms, with or without | 5 // Redistribution and use in source and binary forms, with or without |
| 6 // modification, are permitted provided that the following conditions are | 6 // modification, are permitted provided that the following conditions are |
| 7 // met: | 7 // met: |
| 8 // | 8 // |
| 9 // - Redistributions of source code must retain the above copyright notice, | 9 // - Redistributions of source code must retain the above copyright notice, |
| 10 // this list of conditions and the following disclaimer. | 10 // this list of conditions and the following disclaimer. |
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| 294 Assembler::set_target_address_at(pc_ + Assembler::kInstrSize, | 294 Assembler::set_target_address_at(pc_ + Assembler::kInstrSize, |
| 295 host_, | 295 host_, |
| 296 stub->instruction_start()); | 296 stub->instruction_start()); |
| 297 } | 297 } |
| 298 | 298 |
| 299 | 299 |
| 300 Address RelocInfo::call_address() { | 300 Address RelocInfo::call_address() { |
| 301 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || | 301 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
| 302 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); | 302 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
| 303 // The pc_ offset of 0 assumes mips patched return sequence per | 303 // The pc_ offset of 0 assumes mips patched return sequence per |
| 304 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or | 304 // debug-mips.cc BreakLocation::SetDebugBreakAtReturn(), or |
| 305 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot(). | 305 // debug break slot per BreakLocation::SetDebugBreakAtSlot(). |
| 306 return Assembler::target_address_at(pc_, host_); | 306 return Assembler::target_address_at(pc_, host_); |
| 307 } | 307 } |
| 308 | 308 |
| 309 | 309 |
| 310 void RelocInfo::set_call_address(Address target) { | 310 void RelocInfo::set_call_address(Address target) { |
| 311 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || | 311 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
| 312 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); | 312 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
| 313 // The pc_ offset of 0 assumes mips patched return sequence per | 313 // The pc_ offset of 0 assumes mips patched return sequence per |
| 314 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or | 314 // debug-mips.cc BreakLocation::SetDebugBreakAtReturn(), or |
| 315 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot(). | 315 // debug break slot per BreakLocation::SetDebugBreakAtSlot(). |
| 316 Assembler::set_target_address_at(pc_, host_, target); | 316 Assembler::set_target_address_at(pc_, host_, target); |
| 317 if (host() != NULL) { | 317 if (host() != NULL) { |
| 318 Object* target_code = Code::GetCodeFromTargetAddress(target); | 318 Object* target_code = Code::GetCodeFromTargetAddress(target); |
| 319 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( | 319 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| 320 host(), this, HeapObject::cast(target_code)); | 320 host(), this, HeapObject::cast(target_code)); |
| 321 } | 321 } |
| 322 } | 322 } |
| 323 | 323 |
| 324 | 324 |
| 325 Object* RelocInfo::call_object() { | 325 Object* RelocInfo::call_object() { |
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| 453 } | 453 } |
| 454 *reinterpret_cast<uint64_t*>(pc_) = x; | 454 *reinterpret_cast<uint64_t*>(pc_) = x; |
| 455 pc_ += kInstrSize * 2; | 455 pc_ += kInstrSize * 2; |
| 456 CheckTrampolinePoolQuick(); | 456 CheckTrampolinePoolQuick(); |
| 457 } | 457 } |
| 458 | 458 |
| 459 | 459 |
| 460 } } // namespace v8::internal | 460 } } // namespace v8::internal |
| 461 | 461 |
| 462 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ | 462 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ |
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