| Index: src/compiler/ia32/instruction-selector-ia32.cc
|
| diff --git a/src/compiler/ia32/instruction-selector-ia32.cc b/src/compiler/ia32/instruction-selector-ia32.cc
|
| index 56af208bf437e7c73252729523fb998723674687..7b945faa95990c3047f4b73e5df9d06bea26f1ef 100644
|
| --- a/src/compiler/ia32/instruction-selector-ia32.cc
|
| +++ b/src/compiler/ia32/instruction-selector-ia32.cc
|
| @@ -634,12 +634,15 @@ void InstructionSelector::VisitTruncateFloat64ToFloat32(Node* node) {
|
|
|
| void InstructionSelector::VisitFloat64Add(Node* node) {
|
| IA32OperandGenerator g(this);
|
| + Node* left = node->InputAt(0);
|
| + Node* right = node->InputAt(1);
|
| + if (g.CanBeBetterLeftOperand(right)) std::swap(left, right);
|
| if (IsSupported(AVX)) {
|
| - Emit(kAVXFloat64Add, g.DefineAsRegister(node),
|
| - g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
|
| + Emit(kAVXFloat64Add, g.DefineAsRegister(node), g.UseRegister(left),
|
| + g.Use(right));
|
| } else {
|
| - Emit(kSSEFloat64Add, g.DefineSameAsFirst(node),
|
| - g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
|
| + Emit(kSSEFloat64Add, g.DefineSameAsFirst(node), g.UseRegister(left),
|
| + g.Use(right));
|
| }
|
| }
|
|
|
| @@ -658,12 +661,15 @@ void InstructionSelector::VisitFloat64Sub(Node* node) {
|
|
|
| void InstructionSelector::VisitFloat64Mul(Node* node) {
|
| IA32OperandGenerator g(this);
|
| + Node* left = node->InputAt(0);
|
| + Node* right = node->InputAt(1);
|
| + if (g.CanBeBetterLeftOperand(right)) std::swap(left, right);
|
| if (IsSupported(AVX)) {
|
| - Emit(kAVXFloat64Mul, g.DefineAsRegister(node),
|
| - g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
|
| + Emit(kAVXFloat64Mul, g.DefineAsRegister(node), g.UseRegister(left),
|
| + g.Use(right));
|
| } else {
|
| - Emit(kSSEFloat64Mul, g.DefineSameAsFirst(node),
|
| - g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
|
| + Emit(kSSEFloat64Mul, g.DefineSameAsFirst(node), g.UseRegister(left),
|
| + g.Use(right));
|
| }
|
| }
|
|
|
|
|