[x86] Use better left operand heuristic for Float64Add and Float64Mul.

src/compiler/ia32/instruction-selector-ia32.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 616 matching lines @@
 
 
 void InstructionSelector::VisitTruncateFloat64ToFloat32(Node* node) {
   IA32OperandGenerator g(this);
   Emit(kSSECvtsd2ss, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
 }
 
 
 void InstructionSelector::VisitFloat64Add(Node* node) {
   IA32OperandGenerator g(this);
+  Node* left = node->InputAt(0);
+  Node* right = node->InputAt(1);
+  if (g.CanBeBetterLeftOperand(right)) std::swap(left, right);
   if (IsSupported(AVX)) {
-    Emit(kAVXFloat64Add, g.DefineAsRegister(node),
-         g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
+    Emit(kAVXFloat64Add, g.DefineAsRegister(node), g.UseRegister(left),
+         g.Use(right));
   } else {
-    Emit(kSSEFloat64Add, g.DefineSameAsFirst(node),
-         g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
+    Emit(kSSEFloat64Add, g.DefineSameAsFirst(node), g.UseRegister(left),
+         g.Use(right));
   }
 }
 
 
 void InstructionSelector::VisitFloat64Sub(Node* node) {
   IA32OperandGenerator g(this);
   if (IsSupported(AVX)) {
     Emit(kAVXFloat64Sub, g.DefineAsRegister(node),
          g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
   } else {
     Emit(kSSEFloat64Sub, g.DefineSameAsFirst(node),
          g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
   }
 }
 
 
 void InstructionSelector::VisitFloat64Mul(Node* node) {
   IA32OperandGenerator g(this);
+  Node* left = node->InputAt(0);
+  Node* right = node->InputAt(1);
+  if (g.CanBeBetterLeftOperand(right)) std::swap(left, right);
   if (IsSupported(AVX)) {
-    Emit(kAVXFloat64Mul, g.DefineAsRegister(node),
-         g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
+    Emit(kAVXFloat64Mul, g.DefineAsRegister(node), g.UseRegister(left),
+         g.Use(right));
   } else {
-    Emit(kSSEFloat64Mul, g.DefineSameAsFirst(node),
-         g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
+    Emit(kSSEFloat64Mul, g.DefineSameAsFirst(node), g.UseRegister(left),
+         g.Use(right));
   }
 }
 
 
 void InstructionSelector::VisitFloat64Div(Node* node) {
   IA32OperandGenerator g(this);
   if (IsSupported(AVX)) {
     Emit(kAVXFloat64Div, g.DefineAsRegister(node),
          g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
   } else {
@@ skipping 399 matching lines @@
            MachineOperatorBuilder::kFloat64Ceil |
            MachineOperatorBuilder::kFloat64RoundTruncate |
            MachineOperatorBuilder::kWord32ShiftIsSafe;
   }
   return MachineOperatorBuilder::Flag::kNoFlags;
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8