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| 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file implements the TargetLoweringX8632 class, which | 10 // This file implements the TargetLoweringX8632 class, which |
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| 741 // An argument either does not need a stack slot (if passed in a | 741 // An argument either does not need a stack slot (if passed in a |
| 742 // register) or already has one (if passed on the stack). | 742 // register) or already has one (if passed on the stack). |
| 743 if (Var->getIsArg()) | 743 if (Var->getIsArg()) |
| 744 continue; | 744 continue; |
| 745 // An unreferenced variable doesn't need a stack slot. | 745 // An unreferenced variable doesn't need a stack slot. |
| 746 if (!IsVarReferenced[Var->getIndex()]) | 746 if (!IsVarReferenced[Var->getIndex()]) |
| 747 continue; | 747 continue; |
| 748 // A spill slot linked to a variable with a stack slot should reuse | 748 // A spill slot linked to a variable with a stack slot should reuse |
| 749 // that stack slot. | 749 // that stack slot. |
| 750 if (SpillVariable *SpillVar = llvm::dyn_cast<SpillVariable>(Var)) { | 750 if (SpillVariable *SpillVar = llvm::dyn_cast<SpillVariable>(Var)) { |
| 751 assert(Var->getWeight() == RegWeight::Zero); | 751 assert(Var->getWeight().isZero()); |
| 752 if (!SpillVar->getLinkedTo()->hasReg()) { | 752 if (!SpillVar->getLinkedTo()->hasReg()) { |
| 753 VariablesLinkedToSpillSlots.push_back(Var); | 753 VariablesLinkedToSpillSlots.push_back(Var); |
| 754 continue; | 754 continue; |
| 755 } | 755 } |
| 756 } | 756 } |
| 757 SpilledVariables.push_back(Var); | 757 SpilledVariables.push_back(Var); |
| 758 } | 758 } |
| 759 | 759 |
| 760 SortedSpilledVariables.reserve(SpilledVariables.size()); | 760 SortedSpilledVariables.reserve(SpilledVariables.size()); |
| 761 sortByAlignment(SortedSpilledVariables, SpilledVariables); | 761 sortByAlignment(SortedSpilledVariables, SpilledVariables); |
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| 4329 _movd(Reg, legalize(ConstantMask, Legal_Reg | Legal_Mem)); | 4329 _movd(Reg, legalize(ConstantMask, Legal_Reg | Legal_Mem)); |
| 4330 _pshufd(Reg, Reg, Ctx->getConstantZero(IceType_i8)); | 4330 _pshufd(Reg, Reg, Ctx->getConstantZero(IceType_i8)); |
| 4331 return Reg; | 4331 return Reg; |
| 4332 } | 4332 } |
| 4333 } | 4333 } |
| 4334 | 4334 |
| 4335 OperandX8632Mem *TargetX8632::getMemoryOperandForStackSlot(Type Ty, | 4335 OperandX8632Mem *TargetX8632::getMemoryOperandForStackSlot(Type Ty, |
| 4336 Variable *Slot, | 4336 Variable *Slot, |
| 4337 uint32_t Offset) { | 4337 uint32_t Offset) { |
| 4338 // Ensure that Loc is a stack slot. | 4338 // Ensure that Loc is a stack slot. |
| 4339 assert(Slot->getWeight() == RegWeight::Zero); | 4339 assert(Slot->getWeight().isZero()); |
| 4340 assert(Slot->getRegNum() == Variable::NoRegister); | 4340 assert(Slot->getRegNum() == Variable::NoRegister); |
| 4341 // Compute the location of Loc in memory. | 4341 // Compute the location of Loc in memory. |
| 4342 // TODO(wala,stichnot): lea should not be required. The address of | 4342 // TODO(wala,stichnot): lea should not be required. The address of |
| 4343 // the stack slot is known at compile time (although not until after | 4343 // the stack slot is known at compile time (although not until after |
| 4344 // addProlog()). | 4344 // addProlog()). |
| 4345 const Type PointerType = IceType_i32; | 4345 const Type PointerType = IceType_i32; |
| 4346 Variable *Loc = makeReg(PointerType); | 4346 Variable *Loc = makeReg(PointerType); |
| 4347 _lea(Loc, Slot); | 4347 _lea(Loc, Slot); |
| 4348 Constant *ConstantOffset = Ctx->getConstantInt32(Offset); | 4348 Constant *ConstantOffset = Ctx->getConstantInt32(Offset); |
| 4349 return OperandX8632Mem::create(Func, Ty, Loc, ConstantOffset); | 4349 return OperandX8632Mem::create(Func, Ty, Loc, ConstantOffset); |
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| 4426 NeedsReg = true; | 4426 NeedsReg = true; |
| 4427 if (NeedsReg) { | 4427 if (NeedsReg) { |
| 4428 From = copyToReg(From, RegNum); | 4428 From = copyToReg(From, RegNum); |
| 4429 } | 4429 } |
| 4430 return From; | 4430 return From; |
| 4431 } | 4431 } |
| 4432 if (Variable *Var = llvm::dyn_cast<Variable>(From)) { | 4432 if (Variable *Var = llvm::dyn_cast<Variable>(From)) { |
| 4433 // Check if the variable is guaranteed a physical register. This | 4433 // Check if the variable is guaranteed a physical register. This |
| 4434 // can happen either when the variable is pre-colored or when it is | 4434 // can happen either when the variable is pre-colored or when it is |
| 4435 // assigned infinite weight. | 4435 // assigned infinite weight. |
| 4436 bool MustHaveRegister = | 4436 bool MustHaveRegister = (Var->hasReg() || Var->getWeight().isInf()); |
| 4437 (Var->hasReg() || Var->getWeight() == RegWeight::Inf); | |
| 4438 // We need a new physical register for the operand if: | 4437 // We need a new physical register for the operand if: |
| 4439 // Mem is not allowed and Var isn't guaranteed a physical | 4438 // Mem is not allowed and Var isn't guaranteed a physical |
| 4440 // register, or | 4439 // register, or |
| 4441 // RegNum is required and Var->getRegNum() doesn't match. | 4440 // RegNum is required and Var->getRegNum() doesn't match. |
| 4442 if ((!(Allowed & Legal_Mem) && !MustHaveRegister) || | 4441 if ((!(Allowed & Legal_Mem) && !MustHaveRegister) || |
| 4443 (RegNum != Variable::NoRegister && RegNum != Var->getRegNum())) { | 4442 (RegNum != Variable::NoRegister && RegNum != Var->getRegNum())) { |
| 4444 From = copyToReg(From, RegNum); | 4443 From = copyToReg(From, RegNum); |
| 4445 } | 4444 } |
| 4446 return From; | 4445 return From; |
| 4447 } | 4446 } |
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| 4766 case FT_Asm: | 4765 case FT_Asm: |
| 4767 case FT_Iasm: { | 4766 case FT_Iasm: { |
| 4768 OstreamLocker L(Ctx); | 4767 OstreamLocker L(Ctx); |
| 4769 emitConstantPool<PoolTypeConverter<float>>(Ctx); | 4768 emitConstantPool<PoolTypeConverter<float>>(Ctx); |
| 4770 emitConstantPool<PoolTypeConverter<double>>(Ctx); | 4769 emitConstantPool<PoolTypeConverter<double>>(Ctx); |
| 4771 } break; | 4770 } break; |
| 4772 } | 4771 } |
| 4773 } | 4772 } |
| 4774 | 4773 |
| 4775 } // end of namespace Ice | 4774 } // end of namespace Ice |
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