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Unified Diff: src/compiler/mips/code-generator-mips.cc

Issue 948843002: MIPS: [turbofan] Fix several int vs size_t issues. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 10 months ago
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Index: src/compiler/mips/code-generator-mips.cc
diff --git a/src/compiler/mips/code-generator-mips.cc b/src/compiler/mips/code-generator-mips.cc
index ec98ea8aa391ca4385beb2366595decbfbfbf9cc..992cd5e67c922f0e4d23e74ccdb0b4d7a295ba86 100644
--- a/src/compiler/mips/code-generator-mips.cc
+++ b/src/compiler/mips/code-generator-mips.cc
@@ -39,11 +39,11 @@ class MipsOperandConverter FINAL : public InstructionOperandConverter {
MipsOperandConverter(CodeGenerator* gen, Instruction* instr)
: InstructionOperandConverter(gen, instr) {}
- FloatRegister OutputSingleRegister(int index = 0) {
+ FloatRegister OutputSingleRegister(size_t index = 0) {
return ToSingleRegister(instr_->OutputAt(index));
}
- FloatRegister InputSingleRegister(int index) {
+ FloatRegister InputSingleRegister(size_t index) {
return ToSingleRegister(instr_->InputAt(index));
}
@@ -53,7 +53,7 @@ class MipsOperandConverter FINAL : public InstructionOperandConverter {
return ToDoubleRegister(op);
}
- Operand InputImmediate(int index) {
+ Operand InputImmediate(size_t index) {
Constant constant = ToConstant(instr_->InputAt(index));
switch (constant.type()) {
case Constant::kInt32:
@@ -78,7 +78,7 @@ class MipsOperandConverter FINAL : public InstructionOperandConverter {
return Operand(zero_reg);
}
- Operand InputOperand(int index) {
+ Operand InputOperand(size_t index) {
InstructionOperand* op = instr_->InputAt(index);
if (op->IsRegister()) {
return Operand(ToRegister(op));
@@ -86,8 +86,8 @@ class MipsOperandConverter FINAL : public InstructionOperandConverter {
return InputImmediate(index);
}
- MemOperand MemoryOperand(int* first_index) {
- const int index = *first_index;
+ MemOperand MemoryOperand(size_t* first_index) {
+ const size_t index = *first_index;
switch (AddressingModeField::decode(instr_->opcode())) {
case kMode_None:
break;
@@ -102,7 +102,7 @@ class MipsOperandConverter FINAL : public InstructionOperandConverter {
return MemOperand(no_reg);
}
- MemOperand MemoryOperand(int index = 0) { return MemoryOperand(&index); }
+ MemOperand MemoryOperand(size_t index = 0) { return MemoryOperand(&index); }
MemOperand ToMemOperand(InstructionOperand* op) const {
DCHECK(op != NULL);
@@ -116,7 +116,7 @@ class MipsOperandConverter FINAL : public InstructionOperandConverter {
};
-static inline bool HasRegisterInput(Instruction* instr, int index) {
+static inline bool HasRegisterInput(Instruction* instr, size_t index) {
return instr->InputAt(index)->IsRegister();
}
@@ -646,7 +646,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
break;
}
case kMipsSwc1: {
- int index = 0;
+ size_t index = 0;
MemOperand operand = i.MemoryOperand(&index);
__ swc1(i.InputSingleRegister(index), operand);
break;
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