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Unified Diff: lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Issue 939073008: Rebased PNaCl localmods in LLVM to 223109 (Closed)
Patch Set: undo localmod Created 5 years, 10 months ago
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Index: lib/Target/ARM/ARMLoadStoreOptimizer.cpp
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index c429ac18521109ae6eddb4f99baf11bfdde16a87..3012f229a4c602c495768e3fc9a3699f11e3719b 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -1071,6 +1071,7 @@ static unsigned getUpdatingLSMultipleOpcode(unsigned Opc,
/// ldmia rn, <ra, rb, rc>
/// =>
/// ldmdb rn!, <ra, rb, rc>
+/// @LOCALMOD This is especially useful for rn == sp
bool ARMLoadStoreOpt::MergeBaseUpdateLSMultiple(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
bool &Advance,
@@ -1755,7 +1756,16 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
/// mov pc, lr
/// =>
/// ldmfd sp!, {..., pc}
+// @LOCALMOD for sfi we do not want this to happen
bool ARMLoadStoreOpt::MergeReturnIntoLDM(MachineBasicBlock &MBB) {
+ // @LOCALMOD-START
+ // For NaCl, do not load into PC directly for a return, since NaCl requires
+ // masking the address first.
+ if (STI->isTargetNaCl()) {
+ return false;
+ }
+ // @LOCALMOD-END
+
// Thumb1 LDM doesn't allow high registers.
if (isThumb1) return false;
if (MBB.empty()) return false;
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