| Index: lib/Target/ARM/ARMBaseRegisterInfo.cpp
|
| diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
|
| index 6dc0493c797692822cec9dfc0b8bdf8ee23ea219..cfd26e7782aeaf7268743470d394c55e15c5deaa 100644
|
| --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp
|
| +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
|
| @@ -60,6 +60,8 @@ ARMBaseRegisterInfo::ARMBaseRegisterInfo(const ARMSubtarget &sti)
|
|
|
| const MCPhysReg*
|
| ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
|
| + if (STI.isTargetNaCl()) return CSR_NaCl_SaveList; // @LOCALMOD
|
| +
|
| const MCPhysReg *RegList = (STI.isTargetIOS() && !STI.isAAPCS_ABI())
|
| ? CSR_iOS_SaveList
|
| : CSR_AAPCS_SaveList;
|
| @@ -92,6 +94,7 @@ ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
|
|
|
| const uint32_t*
|
| ARMBaseRegisterInfo::getCallPreservedMask(CallingConv::ID CC) const {
|
| + if (STI.isTargetNaCl()) return CSR_NaCl_RegMask; // @LOCALMOD
|
| if (CC == CallingConv::GHC)
|
| // This is academic becase all GHC calls are (supposed to be) tail calls
|
| return CSR_NoRegs_RegMask;
|
|
|