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| 1 ; RUN: opt -expand-shufflevector %s -S | FileCheck %s |
| 2 |
| 3 ; Test that shufflevector is expanded to insertelement / extractelement. |
| 4 |
| 5 define <4 x i32> @test_splat_lo_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 6 ; CHECK-LABEL: test_splat_lo_4xi32 |
| 7 ; CHECK-NEXT: %1 = extractelement <4 x i32> %lhs, i32 0 |
| 8 ; CHECK-NEXT: %2 = extractelement <4 x i32> %lhs, i32 0 |
| 9 ; CHECK-NEXT: %3 = extractelement <4 x i32> %lhs, i32 0 |
| 10 ; CHECK-NEXT: %4 = extractelement <4 x i32> %lhs, i32 0 |
| 11 ; CHECK-NEXT: %5 = insertelement <4 x i32> undef, i32 %1, i32 0 |
| 12 ; CHECK-NEXT: %6 = insertelement <4 x i32> %5, i32 %2, i32 1 |
| 13 ; CHECK-NEXT: %7 = insertelement <4 x i32> %6, i32 %3, i32 2 |
| 14 ; CHECK-NEXT: %8 = insertelement <4 x i32> %7, i32 %4, i32 3 |
| 15 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> <i32 0, i32 0,
i32 0, i32 0> |
| 16 ; CHECK-NEXT: ret <4 x i32> %8 |
| 17 ret <4 x i32> %res |
| 18 } |
| 19 |
| 20 define <4 x i32> @test_splat_hi_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 21 ; CHECK-LABEL: test_splat_hi_4xi32 |
| 22 ; CHECK-NEXT: %1 = extractelement <4 x i32> %rhs, i32 0 |
| 23 ; CHECK-NEXT: %2 = extractelement <4 x i32> %rhs, i32 0 |
| 24 ; CHECK-NEXT: %3 = extractelement <4 x i32> %rhs, i32 0 |
| 25 ; CHECK-NEXT: %4 = extractelement <4 x i32> %rhs, i32 0 |
| 26 ; CHECK-NEXT: %5 = insertelement <4 x i32> undef, i32 %1, i32 0 |
| 27 ; CHECK-NEXT: %6 = insertelement <4 x i32> %5, i32 %2, i32 1 |
| 28 ; CHECK-NEXT: %7 = insertelement <4 x i32> %6, i32 %3, i32 2 |
| 29 ; CHECK-NEXT: %8 = insertelement <4 x i32> %7, i32 %4, i32 3 |
| 30 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> <i32 4, i32 4,
i32 4, i32 4> |
| 31 ; CHECK-NEXT: ret <4 x i32> %8 |
| 32 ret <4 x i32> %res |
| 33 } |
| 34 |
| 35 define <4 x i32> @test_id_lo_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 36 ; CHECK-LABEL: test_id_lo_4xi32 |
| 37 ; CHECK-NEXT: %1 = extractelement <4 x i32> %lhs, i32 0 |
| 38 ; CHECK-NEXT: %2 = extractelement <4 x i32> %lhs, i32 1 |
| 39 ; CHECK-NEXT: %3 = extractelement <4 x i32> %lhs, i32 2 |
| 40 ; CHECK-NEXT: %4 = extractelement <4 x i32> %lhs, i32 3 |
| 41 ; CHECK-NEXT: %5 = insertelement <4 x i32> undef, i32 %1, i32 0 |
| 42 ; CHECK-NEXT: %6 = insertelement <4 x i32> %5, i32 %2, i32 1 |
| 43 ; CHECK-NEXT: %7 = insertelement <4 x i32> %6, i32 %3, i32 2 |
| 44 ; CHECK-NEXT: %8 = insertelement <4 x i32> %7, i32 %4, i32 3 |
| 45 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> <i32 0, i32 1,
i32 2, i32 3> |
| 46 ; CHECK-NEXT: ret <4 x i32> %8 |
| 47 ret <4 x i32> %res |
| 48 } |
| 49 |
| 50 define <4 x i32> @test_id_hi_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 51 ; CHECK-LABEL: test_id_hi_4xi32 |
| 52 ; CHECK-NEXT: %1 = extractelement <4 x i32> %rhs, i32 0 |
| 53 ; CHECK-NEXT: %2 = extractelement <4 x i32> %rhs, i32 1 |
| 54 ; CHECK-NEXT: %3 = extractelement <4 x i32> %rhs, i32 2 |
| 55 ; CHECK-NEXT: %4 = extractelement <4 x i32> %rhs, i32 3 |
| 56 ; CHECK-NEXT: %5 = insertelement <4 x i32> undef, i32 %1, i32 0 |
| 57 ; CHECK-NEXT: %6 = insertelement <4 x i32> %5, i32 %2, i32 1 |
| 58 ; CHECK-NEXT: %7 = insertelement <4 x i32> %6, i32 %3, i32 2 |
| 59 ; CHECK-NEXT: %8 = insertelement <4 x i32> %7, i32 %4, i32 3 |
| 60 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> <i32 4, i32 5,
i32 6, i32 7> |
| 61 ; CHECK-NEXT: ret <4 x i32> %8 |
| 62 ret <4 x i32> %res |
| 63 } |
| 64 |
| 65 define <4 x i32> @test_interleave_lo_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 66 ; CHECK-LABEL: test_interleave_lo_4xi32 |
| 67 ; CHECK-NEXT: %1 = extractelement <4 x i32> %lhs, i32 0 |
| 68 ; CHECK-NEXT: %2 = extractelement <4 x i32> %rhs, i32 0 |
| 69 ; CHECK-NEXT: %3 = extractelement <4 x i32> %lhs, i32 1 |
| 70 ; CHECK-NEXT: %4 = extractelement <4 x i32> %rhs, i32 1 |
| 71 ; CHECK-NEXT: %5 = insertelement <4 x i32> undef, i32 %1, i32 0 |
| 72 ; CHECK-NEXT: %6 = insertelement <4 x i32> %5, i32 %2, i32 1 |
| 73 ; CHECK-NEXT: %7 = insertelement <4 x i32> %6, i32 %3, i32 2 |
| 74 ; CHECK-NEXT: %8 = insertelement <4 x i32> %7, i32 %4, i32 3 |
| 75 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> <i32 0, i32 4,
i32 1, i32 5> |
| 76 ; CHECK-NEXT: ret <4 x i32> %8 |
| 77 ret <4 x i32> %res |
| 78 } |
| 79 |
| 80 define <4 x i32> @test_interleave_hi_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 81 ; CHECK-LABEL: test_interleave_hi_4xi32 |
| 82 ; CHECK-NEXT: %1 = extractelement <4 x i32> %lhs, i32 1 |
| 83 ; CHECK-NEXT: %2 = extractelement <4 x i32> %rhs, i32 1 |
| 84 ; CHECK-NEXT: %3 = extractelement <4 x i32> %lhs, i32 3 |
| 85 ; CHECK-NEXT: %4 = extractelement <4 x i32> %rhs, i32 3 |
| 86 ; CHECK-NEXT: %5 = insertelement <4 x i32> undef, i32 %1, i32 0 |
| 87 ; CHECK-NEXT: %6 = insertelement <4 x i32> %5, i32 %2, i32 1 |
| 88 ; CHECK-NEXT: %7 = insertelement <4 x i32> %6, i32 %3, i32 2 |
| 89 ; CHECK-NEXT: %8 = insertelement <4 x i32> %7, i32 %4, i32 3 |
| 90 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> <i32 1, i32 5,
i32 3, i32 7> |
| 91 ; CHECK-NEXT: ret <4 x i32> %8 |
| 92 ret <4 x i32> %res |
| 93 } |
| 94 |
| 95 define <4 x i32> @test_undef_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 96 ; CHECK-LABEL: test_undef_4xi32 |
| 97 ; CHECK-NEXT: %1 = insertelement <4 x i32> undef, i32 undef, i32 0 |
| 98 ; CHECK-NEXT: %2 = insertelement <4 x i32> %1, i32 undef, i32 1 |
| 99 ; CHECK-NEXT: %3 = insertelement <4 x i32> %2, i32 undef, i32 2 |
| 100 ; CHECK-NEXT: %4 = insertelement <4 x i32> %3, i32 undef, i32 3 |
| 101 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> undef |
| 102 ; CHECK-NEXT: ret <4 x i32> %4 |
| 103 ret <4 x i32> %res |
| 104 } |
| 105 |
| 106 define <2 x i32> @test_narrow_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 107 ; CHECK-LABEL: test_narrow_4xi32 |
| 108 ; CHECK-NEXT: %1 = extractelement <4 x i32> %lhs, i32 0 |
| 109 ; CHECK-NEXT: %2 = extractelement <4 x i32> %rhs, i32 0 |
| 110 ; CHECK-NEXT: %3 = insertelement <2 x i32> undef, i32 %1, i32 0 |
| 111 ; CHECK-NEXT: %4 = insertelement <2 x i32> %3, i32 %2, i32 1 |
| 112 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <2 x i32> <i32 0, i32 4> |
| 113 ; CHECK-NEXT: ret <2 x i32> %4 |
| 114 ret <2 x i32> %res |
| 115 } |
| 116 |
| 117 define <8 x i32> @test_widen_4xi32(<4 x i32> %lhs, <4 x i32> %rhs) { |
| 118 ; CHECK-LABEL: test_widen_4xi32 |
| 119 ; CHECK-NEXT: %1 = extractelement <4 x i32> %rhs, i32 3 |
| 120 ; CHECK-NEXT: %2 = extractelement <4 x i32> %rhs, i32 2 |
| 121 ; CHECK-NEXT: %3 = extractelement <4 x i32> %rhs, i32 1 |
| 122 ; CHECK-NEXT: %4 = extractelement <4 x i32> %rhs, i32 0 |
| 123 ; CHECK-NEXT: %5 = extractelement <4 x i32> %lhs, i32 3 |
| 124 ; CHECK-NEXT: %6 = extractelement <4 x i32> %lhs, i32 2 |
| 125 ; CHECK-NEXT: %7 = extractelement <4 x i32> %lhs, i32 1 |
| 126 ; CHECK-NEXT: %8 = extractelement <4 x i32> %lhs, i32 0 |
| 127 ; CHECK-NEXT: %9 = insertelement <8 x i32> undef, i32 %1, i32 0 |
| 128 ; CHECK-NEXT: %10 = insertelement <8 x i32> %9, i32 %2, i32 1 |
| 129 ; CHECK-NEXT: %11 = insertelement <8 x i32> %10, i32 %3, i32 2 |
| 130 ; CHECK-NEXT: %12 = insertelement <8 x i32> %11, i32 %4, i32 3 |
| 131 ; CHECK-NEXT: %13 = insertelement <8 x i32> %12, i32 %5, i32 4 |
| 132 ; CHECK-NEXT: %14 = insertelement <8 x i32> %13, i32 %6, i32 5 |
| 133 ; CHECK-NEXT: %15 = insertelement <8 x i32> %14, i32 %7, i32 6 |
| 134 ; CHECK-NEXT: %16 = insertelement <8 x i32> %15, i32 %8, i32 7 |
| 135 %res = shufflevector <4 x i32> %lhs, <4 x i32> %rhs, <8 x i32> <i32 7, i32 6,
i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> |
| 136 ; CHECK-NEXT: ret <8 x i32> %16 |
| 137 ret <8 x i32> %res |
| 138 } |
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