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Issue 939073008: Rebased PNaCl localmods in LLVM to 223109 (Closed)
Patch Set: undo localmod Created 5 years, 10 months ago
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1 ; Tests that we don't write the fast (floating point) attributes into
2 ; PNaCl bitcode files (i.e. flags fast, nnan, ninf, nsz, and arcp).
3
4 ; Test 1: Show that flags are removed.
5 ; RUN: llvm-as < %s | pnacl-freeze | pnacl-thaw | llvm-dis - \
6 ; RUN: | FileCheck %s
7
8 ; Test 2: Show that the bitcode files do not contain flags (i.e.
9 ; the corresponding BINOP records only have 3 values, not 4).
10 ; RUN: llvm-as < %s | pnacl-freeze | pnacl-bcanalyzer -dump-records \
11 ; RUN: | FileCheck %s -check-prefix=RECORD
12
13 define void @foo() {
14 ; Show that we handle all flags for fadd
15 %1 = fadd fast double 1.000000e+00, 2.000000e+00
16 %2 = fadd nnan double 3.000000e+00, 4.000000e+00
17 %3 = fadd ninf double 5.000000e+00, 6.000000e+00
18 %4 = fadd nsz double 7.000000e+00, 8.000000e+00
19 %5 = fadd arcp double 9.000000e+00, 10.000000e+00
20
21 ; CHECK: %1 = fadd double 1.000000e+00, 2.000000e+00
22 ; CHECK: %2 = fadd double 3.000000e+00, 4.000000e+00
23 ; CHECK: %3 = fadd double 5.000000e+00, 6.000000e+00
24 ; CHECK: %4 = fadd double 7.000000e+00, 8.000000e+00
25 ; CHECK: %5 = fadd double 9.000000e+00, 1.000000e+01
26
27 ; RECORD: <INST_BINOP op0=10 op1=9 op2=0/>
28 ; RECORD: <INST_BINOP op0=9 op1=8 op2=0/>
29 ; RECORD: <INST_BINOP op0=8 op1=7 op2=0/>
30 ; RECORD: <INST_BINOP op0=7 op1=6 op2=0/>
31 ; RECORD: <INST_BINOP op0=6 op1=5 op2=0/>
32
33 ; Show that we handle all flags for fsub
34 %6 = fsub fast double 1.000000e+00, 2.000000e+00
35 %7 = fsub nnan double 3.000000e+00, 4.000000e+00
36 %8 = fsub ninf double 5.000000e+00, 6.000000e+00
37 %9 = fsub nsz double 7.000000e+00, 8.000000e+00
38 %10 = fsub arcp double 9.000000e+00, 10.000000e+00
39
40 ; CHECK: %6 = fsub double 1.000000e+00, 2.000000e+00
41 ; CHECK: %7 = fsub double 3.000000e+00, 4.000000e+00
42 ; CHECK: %8 = fsub double 5.000000e+00, 6.000000e+00
43 ; CHECK: %9 = fsub double 7.000000e+00, 8.000000e+00
44 ; CHECK: %10 = fsub double 9.000000e+00, 1.000000e+01
45
46 ; RECORD: <INST_BINOP op0=15 op1=14 op2=1/>
47 ; RECORD: <INST_BINOP op0=14 op1=13 op2=1/>
48 ; RECORD: <INST_BINOP op0=13 op1=12 op2=1/>
49 ; RECORD: <INST_BINOP op0=12 op1=11 op2=1/>
50 ; RECORD: <INST_BINOP op0=11 op1=10 op2=1/>
51
52 ; Show that we can handle all flags for fmul
53 %11 = fmul fast double 1.000000e+00, 2.000000e+00
54 %12 = fmul nnan double 3.000000e+00, 4.000000e+00
55 %13 = fmul ninf double 5.000000e+00, 6.000000e+00
56 %14 = fmul nsz double 7.000000e+00, 8.000000e+00
57 %15 = fmul arcp double 9.000000e+00, 10.000000e+00
58
59 ; CHECK: %11 = fmul double 1.000000e+00, 2.000000e+00
60 ; CHECK: %12 = fmul double 3.000000e+00, 4.000000e+00
61 ; CHECK: %13 = fmul double 5.000000e+00, 6.000000e+00
62 ; CHECK: %14 = fmul double 7.000000e+00, 8.000000e+00
63 ; CHECK: %15 = fmul double 9.000000e+00, 1.000000e+01
64
65 ; RECORD: <INST_BINOP op0=20 op1=19 op2=2/>
66 ; RECORD: <INST_BINOP op0=19 op1=18 op2=2/>
67 ; RECORD: <INST_BINOP op0=18 op1=17 op2=2/>
68 ; RECORD: <INST_BINOP op0=17 op1=16 op2=2/>
69 ; RECORD: <INST_BINOP op0=16 op1=15 op2=2/>
70
71 ; Show that we can handle all flags for fdiv
72 %16 = fdiv fast double 1.000000e+00, 2.000000e+00
73 %17 = fdiv nnan double 3.000000e+00, 4.000000e+00
74 %18 = fdiv ninf double 5.000000e+00, 6.000000e+00
75 %19 = fdiv nsz double 7.000000e+00, 8.000000e+00
76 %20 = fdiv arcp double 9.000000e+00, 10.000000e+00
77
78 ; CHECK: %16 = fdiv double 1.000000e+00, 2.000000e+00
79 ; CHECK: %17 = fdiv double 3.000000e+00, 4.000000e+00
80 ; CHECK: %18 = fdiv double 5.000000e+00, 6.000000e+00
81 ; CHECK: %19 = fdiv double 7.000000e+00, 8.000000e+00
82 ; CHECK: %20 = fdiv double 9.000000e+00, 1.000000e+01
83
84 ; RECORD: <INST_BINOP op0=25 op1=24 op2=4/>
85 ; RECORD: <INST_BINOP op0=24 op1=23 op2=4/>
86 ; RECORD: <INST_BINOP op0=23 op1=22 op2=4/>
87 ; RECORD: <INST_BINOP op0=22 op1=21 op2=4/>
88 ; RECORD: <INST_BINOP op0=21 op1=20 op2=4/>
89
90 ; Show that we can handle all flags for frem.
91 %21 = frem fast double 1.000000e+00, 2.000000e+00
92 %22 = frem nnan double 3.000000e+00, 4.000000e+00
93 %23 = frem ninf double 5.000000e+00, 6.000000e+00
94 %24 = frem nsz double 7.000000e+00, 8.000000e+00
95 %25 = frem arcp double 9.000000e+00, 10.000000e+00
96
97 ; CHECK: %21 = frem double 1.000000e+00, 2.000000e+00
98 ; CHECK: %22 = frem double 3.000000e+00, 4.000000e+00
99 ; CHECK: %23 = frem double 5.000000e+00, 6.000000e+00
100 ; CHECK: %24 = frem double 7.000000e+00, 8.000000e+00
101 ; CHECK: %25 = frem double 9.000000e+00, 1.000000e+01
102
103 ; RECORD: <INST_BINOP op0=30 op1=29 op2=6/>
104 ; RECORD: <INST_BINOP op0=29 op1=28 op2=6/>
105 ; RECORD: <INST_BINOP op0=28 op1=27 op2=6/>
106 ; RECORD: <INST_BINOP op0=27 op1=26 op2=6/>
107 ; RECORD: <INST_BINOP op0=26 op1=25 op2=6/>
108
109 ret void
110 }
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