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| (Empty) | |
| 1 ; RUN: pnacl-llc -mtriple=armv7-unknown-nacl -mattr=+neon -filetype=obj %s -o -
\ |
| 2 ; RUN: | llvm-objdump -disassemble -triple armv7 - | FileCheck %s |
| 3 |
| 4 %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> } |
| 5 %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> } |
| 6 %struct.__neon_int32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> } |
| 7 %struct.__neon_float32x2x3_t = type { <2 x float>, <2 x float>, <2 x float> } |
| 8 %struct.__neon_int64x1x3_t = type { <1 x i64>, <1 x i64>, <1 x i64> } |
| 9 |
| 10 %struct.__neon_int8x16x3_t = type { <16 x i8>, <16 x i8>, <16 x i8> } |
| 11 %struct.__neon_int16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> } |
| 12 %struct.__neon_int32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> } |
| 13 %struct.__neon_float32x4x3_t = type { <4 x float>, <4 x float>, <4 x float> } |
| 14 |
| 15 declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8*, i32) nounwind re
adonly |
| 16 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8*, i32) nounwind
readonly |
| 17 declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i8*, i32) nounwind
readonly |
| 18 declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32(i8*, i32) nounwin
d readonly |
| 19 declare %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8*, i32) nounwind
readonly |
| 20 |
| 21 declare %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8*, i32) nounwind
readonly |
| 22 declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16(i8*, i32) nounwind
readonly |
| 23 declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8*, i32) nounwind
readonly |
| 24 declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32(i8*, i32) nounwin
d readonly |
| 25 |
| 26 define <8 x i8> @vld3i8(i32 %foobar, i32 %ba, i8* %A) nounwind { |
| 27 %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 32
) |
| 28 %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 |
| 29 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 2 |
| 30 %tmp4 = add <8 x i8> %tmp2, %tmp3 |
| 31 ; CHECK: bic r2, r2, #3221225472 |
| 32 ; CHECK-NEXT: vld3.8 {{{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}}, [r2:64] |
| 33 ret <8 x i8> %tmp4 |
| 34 } |
| 35 |
| 36 define <4 x i16> @vld3i16(i16* %A) nounwind { |
| 37 %tmp0 = bitcast i16* %A to i8* |
| 38 %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i
32 1) |
| 39 %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0 |
| 40 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2 |
| 41 %tmp4 = add <4 x i16> %tmp2, %tmp3 |
| 42 ; CHECK: bic r0, r0, #3221225472 |
| 43 ; CHECK-NEXT: vld3.16 {{{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}}, [r0] |
| 44 ret <4 x i16> %tmp4 |
| 45 } |
| 46 |
| 47 define <2 x i32> @vld3i32(i32* %A) nounwind { |
| 48 %tmp0 = bitcast i32* %A to i8* |
| 49 %tmp1 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i8* %tmp0, i
32 1) |
| 50 %tmp2 = extractvalue %struct.__neon_int32x2x3_t %tmp1, 0 |
| 51 %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp1, 2 |
| 52 %tmp4 = add <2 x i32> %tmp2, %tmp3 |
| 53 ; CHECK: bic r0, r0, #3221225472 |
| 54 ; CHECK-NEXT: vld3.32 {{{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}}, [r0] |
| 55 ret <2 x i32> %tmp4 |
| 56 } |
| 57 |
| 58 define <1 x i64> @vld3i64(i64* %A) nounwind { |
| 59 %tmp0 = bitcast i64* %A to i8* |
| 60 %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8* %tmp0, i
32 16) |
| 61 %tmp2 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 0 |
| 62 %tmp3 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 2 |
| 63 %tmp4 = add <1 x i64> %tmp2, %tmp3 |
| 64 ; CHECK: bic r0, r0, #3221225472 |
| 65 ; CHECK-NEXT: vld1.64 {{{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}}, [r0:64] |
| 66 ret <1 x i64> %tmp4 |
| 67 } |
| 68 |
| 69 define <16 x i8> @vld3Qi8(i8* %A) nounwind { |
| 70 %tmp1 = call %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8* %A, i32
32) |
| 71 %tmp2 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 0 |
| 72 %tmp3 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 2 |
| 73 %tmp4 = add <16 x i8> %tmp2, %tmp3 |
| 74 ; CHECK: bic r0, r0, #3221225472 |
| 75 ; CHECK-NEXT: vld3.8 {{{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}}, [r0:64]! |
| 76 ret <16 x i8> %tmp4 |
| 77 } |
| 78 |
| 79 define <4 x i16> @vld3i16_update(i16** %ptr, i32 %inc) nounwind { |
| 80 %A = load i16** %ptr |
| 81 %tmp0 = bitcast i16* %A to i8* |
| 82 %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i
32 1) |
| 83 ; CHECK: bic r2, r2, #3221225472 |
| 84 ; CHECK-NEXT: vld3.16 {{{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}}, [r2], r1 |
| 85 %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0 |
| 86 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2 |
| 87 %tmp4 = add <4 x i16> %tmp2, %tmp3 |
| 88 %tmp5 = getelementptr i16* %A, i32 %inc |
| 89 store i16* %tmp5, i16** %ptr |
| 90 ret <4 x i16> %tmp4 |
| 91 } |
| 92 |
| 93 define <4 x i32> @vld3Qi32_update(i32** %ptr) nounwind { |
| 94 %A = load i32** %ptr |
| 95 %tmp0 = bitcast i32* %A to i8* |
| 96 %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8* %tmp0, i
32 1) |
| 97 ; CHECK: bic r1, r1, #3221225472 |
| 98 ; CHECK-NEXT: vld3.32 {{{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}}, [r1]! |
| 99 %tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0 |
| 100 %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 2 |
| 101 %tmp4 = add <4 x i32> %tmp2, %tmp3 |
| 102 %tmp5 = getelementptr i32* %A, i32 12 |
| 103 store i32* %tmp5, i32** %ptr |
| 104 ret <4 x i32> %tmp4 |
| 105 } |
| 106 |
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Chromium Code Reviews
Issue 939073008:
Rebased PNaCl localmods in LLVM to 223109 (Closed)
