Rebased PNaCl localmods in LLVM to 223109

lib/Target/X86/MCTargetDesc/X86BaseInfo.h

 //===-- X86BaseInfo.h - Top level definitions for X86 -------- --*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains small standalone helper functions and enum definitions for
@@ skipping 297 matching lines @@
     MRM_D8 = 48, MRM_D9 = 49, MRM_DA = 50, MRM_DB = 51,
     MRM_DC = 52, MRM_DD = 53, MRM_DE = 54, MRM_DF = 55,
     MRM_E0 = 56, MRM_E1 = 57, MRM_E2 = 58, MRM_E3 = 59,
     MRM_E4 = 60, MRM_E5 = 61, MRM_E8 = 62, MRM_E9 = 63,
     MRM_EA = 64, MRM_EB = 65, MRM_EC = 66, MRM_ED = 67,
     MRM_EE = 68, MRM_F0 = 69, MRM_F1 = 70, MRM_F2 = 71,
     MRM_F3 = 72, MRM_F4 = 73, MRM_F5 = 74, MRM_F6 = 75,
     MRM_F7 = 76, MRM_F8 = 77, MRM_F9 = 78, MRM_FA = 79,
     MRM_FB = 80, MRM_FC = 81, MRM_FD = 82, MRM_FE = 83,
     MRM_FF = 84,
-
+    CustomFrm = 126, // @LOCALMOD
     FormMask       = 127,
 
     //===------------------------------------------------------------------===//
     // Actual flags...
 
     // OpSize - OpSizeFixed implies instruction never needs a 0x66 prefix.
     // OpSize16 means this is a 16-bit instruction and needs 0x66 prefix in
     // 32-bit mode. OpSize32 means this is a 32-bit instruction needs a 0x66
     // prefix in 16-bit mode.
     OpSizeShift = 7,
@@ skipping 319 matching lines @@
   /// is duplicated in the MCInst (e.g. "EAX = addl EAX, [mem]") it is only
   /// counted as one operand.
   ///
   inline int getMemoryOperandNo(uint64_t TSFlags, unsigned Opcode) {
     bool HasVEX_4V = TSFlags & X86II::VEX_4V;
     bool HasMemOp4 = TSFlags & X86II::MemOp4;
     bool HasEVEX_K = TSFlags & X86II::EVEX_K;
 
     switch (TSFlags & X86II::FormMask) {
     default: llvm_unreachable("Unknown FormMask value in getMemoryOperandNo!");
+    case X86II::CustomFrm: // @LOCALMOD
     case X86II::Pseudo:
     case X86II::RawFrm:
     case X86II::AddRegFrm:
     case X86II::MRMDestReg:
     case X86II::MRMSrcReg:
     case X86II::RawFrmImm8:
     case X86II::RawFrmImm16:
     case X86II::RawFrmMemOffs:
     case X86II::RawFrmSrc:
     case X86II::RawFrmDst:
@@ skipping 94 matching lines @@
   
   inline bool isX86_64NonExtLowByteReg(unsigned reg) {
     return (reg == X86::SPL || reg == X86::BPL ||
             reg == X86::SIL || reg == X86::DIL);
   }
 }
 
 } // end namespace llvm;
 
 #endif