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1 //===-- ARMAsmBackend.cpp - ARM Assembler Backend -------------------------===// | 1 //===-- ARMAsmBackend.cpp - ARM Assembler Backend -------------------------===// |
2 // | 2 // |
3 // The LLVM Compiler Infrastructure | 3 // The LLVM Compiler Infrastructure |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 | 9 |
10 #include "MCTargetDesc/ARMMCTargetDesc.h" | 10 #include "MCTargetDesc/ARMMCTargetDesc.h" |
11 #include "MCTargetDesc/ARMAddressingModes.h" | 11 #include "MCTargetDesc/ARMAddressingModes.h" |
12 #include "MCTargetDesc/ARMAsmBackend.h" | 12 #include "MCTargetDesc/ARMAsmBackend.h" |
13 #include "MCTargetDesc/ARMAsmBackendDarwin.h" | 13 #include "MCTargetDesc/ARMAsmBackendDarwin.h" |
14 #include "MCTargetDesc/ARMAsmBackendELF.h" | 14 #include "MCTargetDesc/ARMAsmBackendELF.h" |
| 15 #include "MCTargetDesc/ARMAsmBackendNaClELF.h" // @LOCALMOD |
15 #include "MCTargetDesc/ARMAsmBackendWinCOFF.h" | 16 #include "MCTargetDesc/ARMAsmBackendWinCOFF.h" |
16 #include "MCTargetDesc/ARMBaseInfo.h" | 17 #include "MCTargetDesc/ARMBaseInfo.h" |
17 #include "MCTargetDesc/ARMFixupKinds.h" | 18 #include "MCTargetDesc/ARMFixupKinds.h" |
18 #include "llvm/ADT/StringSwitch.h" | 19 #include "llvm/ADT/StringSwitch.h" |
19 #include "llvm/MC/MCAsmBackend.h" | 20 #include "llvm/MC/MCAsmBackend.h" |
20 #include "llvm/MC/MCAssembler.h" | 21 #include "llvm/MC/MCAssembler.h" |
21 #include "llvm/MC/MCContext.h" | 22 #include "llvm/MC/MCContext.h" |
22 #include "llvm/MC/MCDirectives.h" | 23 #include "llvm/MC/MCDirectives.h" |
23 #include "llvm/MC/MCELFObjectWriter.h" | 24 #include "llvm/MC/MCELFObjectWriter.h" |
24 #include "llvm/MC/MCExpr.h" | 25 #include "llvm/MC/MCExpr.h" |
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764 .Default(MachO::CPU_SUBTYPE_ARM_V7); | 765 .Default(MachO::CPU_SUBTYPE_ARM_V7); |
765 | 766 |
766 return new ARMAsmBackendDarwin(T, TT, CS); | 767 return new ARMAsmBackendDarwin(T, TT, CS); |
767 } | 768 } |
768 case Triple::COFF: | 769 case Triple::COFF: |
769 assert(TheTriple.isOSWindows() && "non-Windows ARM COFF is not supported"); | 770 assert(TheTriple.isOSWindows() && "non-Windows ARM COFF is not supported"); |
770 return new ARMAsmBackendWinCOFF(T, TT); | 771 return new ARMAsmBackendWinCOFF(T, TT); |
771 case Triple::ELF: | 772 case Triple::ELF: |
772 assert(TheTriple.isOSBinFormatELF() && "using ELF for non-ELF target"); | 773 assert(TheTriple.isOSBinFormatELF() && "using ELF for non-ELF target"); |
773 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS()); | 774 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS()); |
| 775 // @LOCALMOD-END |
| 776 if (TheTriple.isOSNaCl()) |
| 777 return new ARMAsmBackendNaClELF(T, TT, OSABI, isLittle); |
| 778 // @LOCALMOD-END |
774 return new ARMAsmBackendELF(T, TT, OSABI, isLittle); | 779 return new ARMAsmBackendELF(T, TT, OSABI, isLittle); |
775 } | 780 } |
776 } | 781 } |
777 | 782 |
778 MCAsmBackend *llvm::createARMLEAsmBackend(const Target &T, | 783 MCAsmBackend *llvm::createARMLEAsmBackend(const Target &T, |
779 const MCRegisterInfo &MRI, | 784 const MCRegisterInfo &MRI, |
780 StringRef TT, StringRef CPU) { | 785 StringRef TT, StringRef CPU) { |
781 return createARMAsmBackend(T, MRI, TT, CPU, true); | 786 return createARMAsmBackend(T, MRI, TT, CPU, true); |
782 } | 787 } |
783 | 788 |
784 MCAsmBackend *llvm::createARMBEAsmBackend(const Target &T, | 789 MCAsmBackend *llvm::createARMBEAsmBackend(const Target &T, |
785 const MCRegisterInfo &MRI, | 790 const MCRegisterInfo &MRI, |
786 StringRef TT, StringRef CPU) { | 791 StringRef TT, StringRef CPU) { |
787 return createARMAsmBackend(T, MRI, TT, CPU, false); | 792 return createARMAsmBackend(T, MRI, TT, CPU, false); |
788 } | 793 } |
789 | 794 |
790 MCAsmBackend *llvm::createThumbLEAsmBackend(const Target &T, | 795 MCAsmBackend *llvm::createThumbLEAsmBackend(const Target &T, |
791 const MCRegisterInfo &MRI, | 796 const MCRegisterInfo &MRI, |
792 StringRef TT, StringRef CPU) { | 797 StringRef TT, StringRef CPU) { |
793 return createARMAsmBackend(T, MRI, TT, CPU, true); | 798 return createARMAsmBackend(T, MRI, TT, CPU, true); |
794 } | 799 } |
795 | 800 |
796 MCAsmBackend *llvm::createThumbBEAsmBackend(const Target &T, | 801 MCAsmBackend *llvm::createThumbBEAsmBackend(const Target &T, |
797 const MCRegisterInfo &MRI, | 802 const MCRegisterInfo &MRI, |
798 StringRef TT, StringRef CPU) { | 803 StringRef TT, StringRef CPU) { |
799 return createARMAsmBackend(T, MRI, TT, CPU, false); | 804 return createARMAsmBackend(T, MRI, TT, CPU, false); |
800 } | 805 } |
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