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| 1 //===-- ARMNaClHeaders.cpp - Print SFI headers to an ARM .s file -----------===/
/ |
| 2 // |
| 3 // The LLVM Compiler Infrastructure |
| 4 // |
| 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. |
| 7 // |
| 8 //===----------------------------------------------------------------------===// |
| 9 // |
| 10 // This file contains the initial header string needed |
| 11 // for the Native Client target in ARM assembly. |
| 12 // |
| 13 //===----------------------------------------------------------------------===// |
| 14 |
| 15 #include "llvm/Support/raw_ostream.h" |
| 16 #include "ARMNaClRewritePass.h" |
| 17 #include <string> |
| 18 |
| 19 using namespace llvm; |
| 20 |
| 21 void EmitSFIHeaders(raw_ostream &O) { |
| 22 O << " @ ========================================\n"; |
| 23 // NOTE: this macro does bundle alignment as follows |
| 24 // if current bundle pos is X emit pX data items of value "val" |
| 25 // NOTE: that pos will be one of: 0,4,8,12 |
| 26 // |
| 27 O << |
| 28 "\t.macro sfi_long_based_on_pos p0 p1 p2 p3 val\n" |
| 29 "\t.set pos, (. - XmagicX) % 16\n" |
| 30 "\t.fill (((\\p3<<12)|(\\p2<<8)|(\\p1<<4)|\\p0)>>pos) & 15, 4, \\val\n" |
| 31 "\t.endm\n" |
| 32 "\n\n"; |
| 33 |
| 34 O << |
| 35 "\t.macro sfi_illegal_if_at_bundle_begining\n" |
| 36 "\tsfi_long_based_on_pos 1 0 0 0 0xe125be70\n" |
| 37 "\t.endm\n" |
| 38 "\n\n"; |
| 39 |
| 40 O << |
| 41 "\t.macro sfi_nop_if_at_bundle_end\n" |
| 42 "\tsfi_long_based_on_pos 0 0 0 1 0xe320f000\n" |
| 43 "\t.endm\n" |
| 44 "\n\n"; |
| 45 |
| 46 O << |
| 47 "\t.macro sfi_nops_to_force_slot3\n" |
| 48 "\tsfi_long_based_on_pos 3 2 1 0 0xe320f000\n" |
| 49 "\t.endm\n" |
| 50 "\n\n"; |
| 51 |
| 52 O << |
| 53 "\t.macro sfi_nops_to_force_slot2\n" |
| 54 "\tsfi_long_based_on_pos 2 1 0 3 0xe320f000\n" |
| 55 "\t.endm\n" |
| 56 "\n\n"; |
| 57 |
| 58 O << |
| 59 "\t.macro sfi_nops_to_force_slot1\n" |
| 60 "\tsfi_long_based_on_pos 1 0 3 2 0xe320f000\n" |
| 61 "\t.endm\n" |
| 62 "\n\n"; |
| 63 |
| 64 O << " @ ========================================\n"; |
| 65 O << |
| 66 "\t.macro sfi_data_mask reg cond\n" |
| 67 "\tbic\\cond \\reg, \\reg, #0xc0000000\n" |
| 68 "\t.endm\n" |
| 69 "\n\n"; |
| 70 |
| 71 O << |
| 72 "\t.macro sfi_data_tst reg\n" |
| 73 "\ttst \\reg, #0xc0000000\n" |
| 74 "\t.endm\n" |
| 75 "\n\n"; |
| 76 |
| 77 O << |
| 78 "\t.macro sfi_code_mask reg cond=\n" |
| 79 "\tbic\\cond \\reg, \\reg, #0xc000000f\n" |
| 80 "\t.endm\n" |
| 81 "\n\n"; |
| 82 |
| 83 O << " @ ========================================\n"; |
| 84 O << |
| 85 "\t.macro sfi_call_preamble cond=\n" |
| 86 "\tsfi_nops_to_force_slot3\n" |
| 87 "\t.endm\n" |
| 88 "\n\n"; |
| 89 |
| 90 O << |
| 91 "\t.macro sfi_return_preamble reg cond=\n" |
| 92 "\tsfi_nop_if_at_bundle_end\n" |
| 93 "\tsfi_code_mask \\reg \\cond\n" |
| 94 "\t.endm\n" |
| 95 "\n\n"; |
| 96 |
| 97 // This is used just before "bx rx" |
| 98 O << |
| 99 "\t.macro sfi_indirect_jump_preamble link cond=\n" |
| 100 "\tsfi_nop_if_at_bundle_end\n" |
| 101 "\tsfi_code_mask \\link \\cond\n" |
| 102 "\t.endm\n" |
| 103 "\n\n"; |
| 104 |
| 105 // This is use just before "blx rx" |
| 106 O << |
| 107 "\t.macro sfi_indirect_call_preamble link cond=\n" |
| 108 "\tsfi_nops_to_force_slot2\n" |
| 109 "\tsfi_code_mask \\link \\cond\n" |
| 110 "\t.endm\n" |
| 111 "\n\n"; |
| 112 |
| 113 O << " @ ========================================\n"; |
| 114 |
| 115 O << |
| 116 "\t.macro sfi_load_store_preamble reg cond\n" |
| 117 "\tsfi_nop_if_at_bundle_end\n" |
| 118 "\tsfi_data_mask \\reg, \\cond\n" |
| 119 "\t.endm\n" |
| 120 "\n\n"; |
| 121 |
| 122 O << |
| 123 "\t.macro sfi_cstore_preamble reg\n" |
| 124 "\tsfi_nop_if_at_bundle_end\n" |
| 125 "\tsfi_data_tst \\reg\n" |
| 126 "\t.endm\n" |
| 127 "\n\n"; |
| 128 |
| 129 O << " @ ========================================\n"; |
| 130 O << "\t.text\n"; |
| 131 } |
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