Rebased PNaCl localmods in LLVM to 223109

lib/Target/ARM/ARMFrameLowering.cpp

 //===-- ARMFrameLowering.cpp - ARM Frame Information ----------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains the ARM implementation of TargetFrameLowering class.
@@ skipping 952 matching lines @@
     bool DeleteRet = false;
     for (; i != 0; --i) {
       unsigned Reg = CSI[i-1].getReg();
       if (!(Func)(Reg, STI.isTargetDarwin())) continue;
 
       // The aligned reloads from area DPRCS2 are not inserted here.
       if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs)
         continue;
 
       if (Reg == ARM::LR && !isTailCall && !isVarArg && !isInterrupt &&
-          STI.hasV5TOps()) {
+          STI.hasV5TOps() &&
+          !STI.isTargetNaCl() /* @LOCALMOD */) {
         Reg = ARM::PC;
         LdmOpc = AFI->isThumbFunction() ? ARM::t2LDMIA_RET : ARM::LDMIA_RET;
         // Fold the return instruction into the LDM.
         DeleteRet = true;
       }
 
       // If NoGap is true, pop consecutive registers and then leave the rest
       // for other instructions. e.g.
       // vpop {d8, d10, d11} -> vpop {d8}, vpop {d10, d11}
       if (NoGap && LastReg && LastReg != Reg-1)
@@ skipping 1120 matching lines @@
   GetMBB->addSuccessor(AllocMBB);
 
   McrMBB->addSuccessor(GetMBB);
 
   PrevStackMBB->addSuccessor(McrMBB);
 
 #ifdef XDEBUG
   MF.verify();
 #endif
 }