Rebased PNaCl localmods in LLVM to 223109

lib/Target/ARM/ARMFastISel.cpp

 //===-- ARMFastISel.cpp - ARM FastISel implementation ---------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines the ARM-specific support for the FastISel class. Some
@@ skipping 474 matching lines @@
     }
     unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
     AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
                             TII.get(Opc), DestReg).addImm(Imm));
     return DestReg;
   }
 
   // Require VFP2 for loading fp constants.
   if (!Subtarget->hasVFP2()) return false;
 
+  // @LOCALMOD-START
+  if (!Subtarget->useConstIslands())
+    return false;
+  // @LOCALMOD-END
+
   // MachineConstantPool wants an explicit alignment.
   unsigned Align = DL.getPrefTypeAlignment(CFP->getType());
   if (Align == 0) {
     // TODO: Figure out if this is correct.
     Align = DL.getTypeAllocSize(CFP->getType());
   }
   unsigned Idx = MCP.getConstantPoolIndex(cast<Constant>(CFP), Align);
   unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
   unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS;
 
@@ skipping 41 matching lines @@
     }
   }
 
   unsigned ResultReg = 0;
   if (Subtarget->useMovt(*FuncInfo.MF))
     ResultReg = fastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
 
   if (ResultReg)
     return ResultReg;
 
+  // @LOCALMOD-START -- Can this just be an assert? (useMovt should be true
+  // so the above code would have handled the constant).
+  if (!Subtarget->useConstIslands())
+    return false;
+  // @LOCALMOD-END
+
   // Load from constant pool.  For now 32-bit only.
   if (VT != MVT::i32)
     return 0;
 
   // MachineConstantPool wants an explicit alignment.
   unsigned Align = DL.getPrefTypeAlignment(C->getType());
   if (Align == 0) {
     // TODO: Figure out if this is correct.
     Align = DL.getTypeAllocSize(C->getType());
   }
@@ skipping 42 matching lines @@
     case Reloc::PIC_:
       Opc = isThumb2 ? ARM::t2MOV_ga_pcrel : ARM::MOV_ga_pcrel;
       break;
     default:
       Opc = isThumb2 ? ARM::t2MOVi32imm : ARM::MOVi32imm;
       break;
     }
     AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
                             TII.get(Opc), DestReg).addGlobalAddress(GV, 0, TF));
   } else {
+    // @LOCALMOD-BEGIN
+    if (!Subtarget->useConstIslands())
+      return false;
+    // @LOCALMOD-END
+
     // MachineConstantPool wants an explicit alignment.
     unsigned Align = DL.getPrefTypeAlignment(GV->getType());
     if (Align == 0) {
       // TODO: Figure out if this is correct.
       Align = DL.getTypeAllocSize(GV->getType());
     }
 
     if (Subtarget->isTargetELF() && RelocM == Reloc::PIC_)
       return ARMLowerPICELF(GV, Align, VT);
 
@@ skipping 2449 matching lines @@
       // iOS always has a FP for backtracking, force other targets
       // to keep their FP when doing FastISel. The emitted code is
       // currently superior, and in cases like test-suite's lencod
       // FastISel isn't quite correct when FP is eliminated.
       TM.Options.NoFramePointerElim = true;
       return new ARMFastISel(funcInfo, libInfo);
     }
     return nullptr;
   }
 }