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Unified Diff: src/arm/assembler-arm.cc

Issue 9315032: ARM: Use ubfx and movw instructions to avoid a PC-relative load on Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 8 years, 11 months ago
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Index: src/arm/assembler-arm.cc
===================================================================
--- src/arm/assembler-arm.cc (revision 10578)
+++ src/arm/assembler-arm.cc (working copy)
@@ -184,6 +184,7 @@
ASSERT(shift_op != ROR || shift_imm != 0); // use RRX if you mean it
rm_ = rm;
rs_ = no_reg;
+ rmode_ = RelocInfo::NONE;
shift_op_ = shift_op;
shift_imm_ = shift_imm & 31;
if (shift_op == RRX) {
@@ -199,6 +200,7 @@
ASSERT(shift_op != RRX);
rm_ = rm;
rs_ = no_reg;
+ rmode_ = RelocInfo::NONE;
shift_op_ = shift_op;
rs_ = rs;
}
@@ -258,6 +260,8 @@
const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16;
const Instr kMovMvnPattern = 0xd * B21;
const Instr kMovMvnFlip = B22;
+const Instr kMovBit = 0;
+const Instr kMvnBit = B22;
const Instr kMovLeaveCCMask = 0xdff * B16;
const Instr kMovLeaveCCPattern = 0x1a0 * B16;
const Instr kMovwMask = 0xff * B20;
@@ -503,6 +507,30 @@
}
+bool Assembler::IsMovw(Instr instr) {
+ return (instr & kMovwMask) == kMovwPattern;
+}
+
+
+bool Assembler::IsMovImmediate(Instr instr) {
+ if ((instr & kMovwMask) == kMovwPattern) return true;
+ if ((instr & kMovMvnMask) == kMovMvnPattern) return true;
+ return false;
+}
+
+
+uint32_t Assembler::GetMovImmediateConstant(Instr instr) {
+ if (IsMovw(instr)) return (instr & 0xfff) | ((instr >> 4) & 0xf000);
+ ASSERT((instr & kMovMvnMask) == kMovMvnPattern);
+ uint32_t constant = (instr & 0xff);
+ uint32_t shift = 2 * ((instr & 0xf00) >> 8);
+ uint32_t shifted = constant >> shift;
+ if (shift != 0) shifted |= constant << (32 - shift);
+ if ((instr & kMovMvnFlip) == kMvnBit) shifted = ~shifted;
+ return shifted;
+}
+
+
bool Assembler::IsTstImmediate(Instr instr) {
return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
(I | TST | S);
@@ -782,6 +810,8 @@
return Serializer::enabled();
} else if (rmode_ == RelocInfo::NONE) {
return false;
+ } else if (rmode_ == RelocInfo::MAP_SIGNATURE) {
+ return false;
}
return true;
}
@@ -845,7 +875,7 @@
ldr(rd, MemOperand(pc, 0), cond);
} else {
// Will probably use movw, will certainly not use constant pool.
- mov(rd, Operand(x.imm32_ & 0xffff), LeaveCC, cond);
+ mov(rd, Operand(x.imm32_ & 0xffff, x.rmode_), LeaveCC, cond);
movt(rd, static_cast<uint32_t>(x.imm32_) >> 16, cond);
}
} else {
@@ -853,6 +883,9 @@
// a constant pool entry by using mvn or movw.
if (!x.must_use_constant_pool() &&
(instr & kMovMvnMask) != kMovMvnPattern) {
+ if (x.rmode_ != RelocInfo::NONE) {
+ RecordRelocInfo(x.rmode_, x.imm32_);
+ }
mov(ip, x, LeaveCC, cond);
} else {
RecordRelocInfo(x.rmode_, x.imm32_);
@@ -871,6 +904,9 @@
ASSERT(!rn.is(pc) && !rd.is(pc) && !x.rm_.is(pc) && !x.rs_.is(pc));
instr |= x.rs_.code()*B8 | x.shift_op_ | B4 | x.rm_.code();
}
+ if (RelocInfo::IsGCRelocMode(x.rmode_)) {
+ RecordRelocInfo(x.rmode_, x.imm32_);
+ }
emit(instr | rn.code()*B16 | rd.code()*B12);
if (rn.is(pc) || x.rm_.is(pc)) {
// Block constant pool emission for one instruction after reading pc.
@@ -2508,12 +2544,14 @@
void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
// We do not try to reuse pool constants.
RelocInfo rinfo(pc_, rmode, data, NULL);
- if (rmode >= RelocInfo::JS_RETURN && rmode <= RelocInfo::DEBUG_BREAK_SLOT) {
+ if (rmode == RelocInfo::MAP_SIGNATURE ||
+ (rmode >= RelocInfo::JS_RETURN && rmode <= RelocInfo::DEBUG_BREAK_SLOT)) {
// Adjust code for new modes.
ASSERT(RelocInfo::IsDebugBreakSlot(rmode)
|| RelocInfo::IsJSReturn(rmode)
|| RelocInfo::IsComment(rmode)
- || RelocInfo::IsPosition(rmode));
+ || RelocInfo::IsPosition(rmode)
+ || RelocInfo::IsMapSignature(rmode));
// These modes do not need an entry in the constant pool.
} else {
ASSERT(num_pending_reloc_info_ < kMaxNumPendingRelocInfo);
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