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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/compiler/instruction-selector.h" | 5 #include "src/compiler/instruction-selector.h" |
| 6 | 6 |
| 7 #include <limits> | 7 #include <limits> |
| 8 | 8 |
| 9 #include "src/compiler/instruction-selector-impl.h" | 9 #include "src/compiler/instruction-selector-impl.h" |
| 10 #include "src/compiler/node-matchers.h" | 10 #include "src/compiler/node-matchers.h" |
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| 478 // We're done with the block. | 478 // We're done with the block. |
| 479 InstructionBlock* instruction_block = | 479 InstructionBlock* instruction_block = |
| 480 sequence()->InstructionBlockAt(block->GetRpoNumber()); | 480 sequence()->InstructionBlockAt(block->GetRpoNumber()); |
| 481 instruction_block->set_code_start(static_cast<int>(instructions_.size())); | 481 instruction_block->set_code_start(static_cast<int>(instructions_.size())); |
| 482 instruction_block->set_code_end(current_block_end); | 482 instruction_block->set_code_end(current_block_end); |
| 483 | 483 |
| 484 current_block_ = NULL; | 484 current_block_ = NULL; |
| 485 } | 485 } |
| 486 | 486 |
| 487 | 487 |
| 488 namespace { | 488 void InstructionSelector::VisitControl(BasicBlock* block) { |
| 489 | |
| 490 V8_INLINE void CheckNoPhis(const BasicBlock* block) { | |
| 491 #ifdef DEBUG | 489 #ifdef DEBUG |
| 492 // Branch targets should not have phis. | 490 // SSA deconstruction requires targets of branches not to have phis. |
| 493 for (BasicBlock::const_iterator i = block->begin(); i != block->end(); ++i) { | 491 // Edge split form guarantees this property, but is more strict. |
| 494 const Node* node = *i; | 492 if (block->SuccessorCount() > 1) { |
| 495 CHECK_NE(IrOpcode::kPhi, node->opcode()); | 493 for (BasicBlock* const successor : block->successors()) { |
| 494 for (Node* const node : *successor) { |
| 495 CHECK(!IrOpcode::IsPhiOpcode(node->opcode())); |
| 496 } |
| 497 } |
| 496 } | 498 } |
| 497 #endif | 499 #endif |
| 498 } | |
| 499 | 500 |
| 500 } // namespace | |
| 501 | |
| 502 | |
| 503 void InstructionSelector::VisitControl(BasicBlock* block) { | |
| 504 Node* input = block->control_input(); | 501 Node* input = block->control_input(); |
| 505 switch (block->control()) { | 502 switch (block->control()) { |
| 506 case BasicBlock::kGoto: | 503 case BasicBlock::kGoto: |
| 507 return VisitGoto(block->SuccessorAt(0)); | 504 return VisitGoto(block->SuccessorAt(0)); |
| 505 case BasicBlock::kCall: { |
| 506 DCHECK_EQ(IrOpcode::kCall, input->opcode()); |
| 507 BasicBlock* success = block->SuccessorAt(0); |
| 508 // TODO(mstarzinger): Record location of {exception} in {handler_table}. |
| 509 // BasicBlock* exception = block->SuccessorAt(1); |
| 510 return VisitCall(input), VisitGoto(success); |
| 511 } |
| 508 case BasicBlock::kBranch: { | 512 case BasicBlock::kBranch: { |
| 509 DCHECK_EQ(IrOpcode::kBranch, input->opcode()); | 513 DCHECK_EQ(IrOpcode::kBranch, input->opcode()); |
| 510 BasicBlock* tbranch = block->SuccessorAt(0); | 514 BasicBlock* tbranch = block->SuccessorAt(0); |
| 511 BasicBlock* fbranch = block->SuccessorAt(1); | 515 BasicBlock* fbranch = block->SuccessorAt(1); |
| 512 // SSA deconstruction requires targets of branches not to have phis. | |
| 513 // Edge split form guarantees this property, but is more strict. | |
| 514 CheckNoPhis(tbranch); | |
| 515 CheckNoPhis(fbranch); | |
| 516 if (tbranch == fbranch) return VisitGoto(tbranch); | 516 if (tbranch == fbranch) return VisitGoto(tbranch); |
| 517 // Treat special Branch(Always, IfTrue, IfFalse) as Goto(IfTrue). | 517 // Treat special Branch(Always, IfTrue, IfFalse) as Goto(IfTrue). |
| 518 Node* const condition = input->InputAt(0); | 518 Node* const condition = input->InputAt(0); |
| 519 if (condition->opcode() == IrOpcode::kAlways) return VisitGoto(tbranch); | 519 if (condition->opcode() == IrOpcode::kAlways) return VisitGoto(tbranch); |
| 520 return VisitBranch(input, tbranch, fbranch); | 520 return VisitBranch(input, tbranch, fbranch); |
| 521 } | 521 } |
| 522 case BasicBlock::kSwitch: { | 522 case BasicBlock::kSwitch: { |
| 523 DCHECK_EQ(IrOpcode::kSwitch, input->opcode()); | 523 DCHECK_EQ(IrOpcode::kSwitch, input->opcode()); |
| 524 // Last successor must be Default. | 524 // Last successor must be Default. |
| 525 BasicBlock* default_branch = block->successors().back(); | 525 BasicBlock* default_branch = block->successors().back(); |
| 526 DCHECK_EQ(IrOpcode::kIfDefault, default_branch->front()->opcode()); | 526 DCHECK_EQ(IrOpcode::kIfDefault, default_branch->front()->opcode()); |
| 527 // SSA deconstruction requires targets of branches not to have phis. | |
| 528 // Edge split form guarantees this property, but is more strict. | |
| 529 CheckNoPhis(default_branch); | |
| 530 // All other successors must be cases. | 527 // All other successors must be cases. |
| 531 size_t case_count = block->SuccessorCount() - 1; | 528 size_t case_count = block->SuccessorCount() - 1; |
| 532 DCHECK_LE(1u, case_count); | 529 DCHECK_LE(1u, case_count); |
| 533 BasicBlock** case_branches = &block->successors().front(); | 530 BasicBlock** case_branches = &block->successors().front(); |
| 534 // Determine case values and their min/max. | 531 // Determine case values and their min/max. |
| 535 int32_t* case_values = zone()->NewArray<int32_t>(case_count); | 532 int32_t* case_values = zone()->NewArray<int32_t>(case_count); |
| 536 int32_t min_value = std::numeric_limits<int32_t>::max(); | 533 int32_t min_value = std::numeric_limits<int32_t>::max(); |
| 537 int32_t max_value = std::numeric_limits<int32_t>::min(); | 534 int32_t max_value = std::numeric_limits<int32_t>::min(); |
| 538 for (size_t index = 0; index < case_count; ++index) { | 535 for (size_t index = 0; index < case_count; ++index) { |
| 539 BasicBlock* branch = case_branches[index]; | 536 BasicBlock* branch = case_branches[index]; |
| 540 int32_t value = OpParameter<int32_t>(branch->front()->op()); | 537 int32_t value = OpParameter<int32_t>(branch->front()->op()); |
| 541 case_values[index] = value; | 538 case_values[index] = value; |
| 542 if (min_value > value) min_value = value; | 539 if (min_value > value) min_value = value; |
| 543 if (max_value < value) max_value = value; | 540 if (max_value < value) max_value = value; |
| 544 // SSA deconstruction requires targets of branches not to have phis. | |
| 545 // Edge split form guarantees this property, but is more strict. | |
| 546 CheckNoPhis(branch); | |
| 547 } | 541 } |
| 548 DCHECK_LE(min_value, max_value); | 542 DCHECK_LE(min_value, max_value); |
| 549 return VisitSwitch(input, default_branch, case_branches, case_values, | 543 return VisitSwitch(input, default_branch, case_branches, case_values, |
| 550 case_count, min_value, max_value); | 544 case_count, min_value, max_value); |
| 551 } | 545 } |
| 552 case BasicBlock::kReturn: { | 546 case BasicBlock::kReturn: { |
| 553 // If the result itself is a return, return its input. | 547 // If the result itself is a return, return its input. |
| 554 Node* value = (input != NULL && input->opcode() == IrOpcode::kReturn) | 548 Node* value = (input != NULL && input->opcode() == IrOpcode::kReturn) |
| 555 ? input->InputAt(0) | 549 ? input->InputAt(0) |
| 556 : input; | 550 : input; |
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| 714 Emit(SourcePositionInstruction::New(instruction_zone(), source_position)); | 708 Emit(SourcePositionInstruction::New(instruction_zone(), source_position)); |
| 715 } | 709 } |
| 716 } | 710 } |
| 717 switch (node->opcode()) { | 711 switch (node->opcode()) { |
| 718 case IrOpcode::kStart: | 712 case IrOpcode::kStart: |
| 719 case IrOpcode::kLoop: | 713 case IrOpcode::kLoop: |
| 720 case IrOpcode::kEnd: | 714 case IrOpcode::kEnd: |
| 721 case IrOpcode::kBranch: | 715 case IrOpcode::kBranch: |
| 722 case IrOpcode::kIfTrue: | 716 case IrOpcode::kIfTrue: |
| 723 case IrOpcode::kIfFalse: | 717 case IrOpcode::kIfFalse: |
| 718 case IrOpcode::kIfSuccess: |
| 719 case IrOpcode::kIfException: |
| 724 case IrOpcode::kSwitch: | 720 case IrOpcode::kSwitch: |
| 725 case IrOpcode::kIfValue: | 721 case IrOpcode::kIfValue: |
| 726 case IrOpcode::kIfDefault: | 722 case IrOpcode::kIfDefault: |
| 727 case IrOpcode::kEffectPhi: | 723 case IrOpcode::kEffectPhi: |
| 728 case IrOpcode::kMerge: | 724 case IrOpcode::kMerge: |
| 729 // No code needed for these graph artifacts. | 725 // No code needed for these graph artifacts. |
| 730 return; | 726 return; |
| 731 case IrOpcode::kFinish: | 727 case IrOpcode::kFinish: |
| 732 return MarkAsReference(node), VisitFinish(node); | 728 return MarkAsReference(node), VisitFinish(node); |
| 733 case IrOpcode::kParameter: { | 729 case IrOpcode::kParameter: { |
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| 1218 MachineOperatorBuilder::Flags | 1214 MachineOperatorBuilder::Flags |
| 1219 InstructionSelector::SupportedMachineOperatorFlags() { | 1215 InstructionSelector::SupportedMachineOperatorFlags() { |
| 1220 return MachineOperatorBuilder::Flag::kNoFlags; | 1216 return MachineOperatorBuilder::Flag::kNoFlags; |
| 1221 } | 1217 } |
| 1222 | 1218 |
| 1223 #endif // !V8_TURBOFAN_BACKEND | 1219 #endif // !V8_TURBOFAN_BACKEND |
| 1224 | 1220 |
| 1225 } // namespace compiler | 1221 } // namespace compiler |
| 1226 } // namespace internal | 1222 } // namespace internal |
| 1227 } // namespace v8 | 1223 } // namespace v8 |
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