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Issue 91913002: net: boost AES-GCM ciphers if the machine has AES-NI. (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/src
Patch Set: Created 7 years ago
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1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "base/cpu.h" 5 #include "base/cpu.h"
6 6
7 #include <string.h> 7 #include <string.h>
8 8
9 #include <algorithm> 9 #include <algorithm>
10 10
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31 has_mmx_(false), 31 has_mmx_(false),
32 has_sse_(false), 32 has_sse_(false),
33 has_sse2_(false), 33 has_sse2_(false),
34 has_sse3_(false), 34 has_sse3_(false),
35 has_ssse3_(false), 35 has_ssse3_(false),
36 has_sse41_(false), 36 has_sse41_(false),
37 has_sse42_(false), 37 has_sse42_(false),
38 has_avx_(false), 38 has_avx_(false),
39 has_avx_hardware_(false), 39 has_avx_hardware_(false),
40 has_non_stop_time_stamp_counter_(false), 40 has_non_stop_time_stamp_counter_(false),
41 has_aesni_(false),
wtc 2013/11/27 18:01:51 Nit: move this member initializer up.
agl 2013/11/27 20:50:57 Done.
41 cpu_vendor_("unknown") { 42 cpu_vendor_("unknown") {
42 Initialize(); 43 Initialize();
43 } 44 }
44 45
45 namespace { 46 namespace {
46 47
47 #if defined(ARCH_CPU_X86_FAMILY) 48 #if defined(ARCH_CPU_X86_FAMILY)
48 #ifndef _MSC_VER 49 #ifndef _MSC_VER
49 50
50 #if defined(__pic__) && defined(__i386__) 51 #if defined(__pic__) && defined(__i386__)
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113 type_ = (cpu_info[0] >> 12) & 0x3; 114 type_ = (cpu_info[0] >> 12) & 0x3;
114 ext_model_ = (cpu_info[0] >> 16) & 0xf; 115 ext_model_ = (cpu_info[0] >> 16) & 0xf;
115 ext_family_ = (cpu_info[0] >> 20) & 0xff; 116 ext_family_ = (cpu_info[0] >> 20) & 0xff;
116 has_mmx_ = (cpu_info[3] & 0x00800000) != 0; 117 has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
117 has_sse_ = (cpu_info[3] & 0x02000000) != 0; 118 has_sse_ = (cpu_info[3] & 0x02000000) != 0;
118 has_sse2_ = (cpu_info[3] & 0x04000000) != 0; 119 has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
119 has_sse3_ = (cpu_info[2] & 0x00000001) != 0; 120 has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
120 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0; 121 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
121 has_sse41_ = (cpu_info[2] & 0x00080000) != 0; 122 has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
122 has_sse42_ = (cpu_info[2] & 0x00100000) != 0; 123 has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
124 has_aesni_ = (cpu_info[2] & 0x02000000) != 0;
wtc 2013/11/27 18:01:51 Nit: this should ideally be set after the has_avx_
agl 2013/11/27 20:50:57 Done.
123 has_avx_hardware_ = 125 has_avx_hardware_ =
124 (cpu_info[2] & 0x10000000) != 0; 126 (cpu_info[2] & 0x10000000) != 0;
125 // AVX instructions will generate an illegal instruction exception unless 127 // AVX instructions will generate an illegal instruction exception unless
126 // a) they are supported by the CPU, 128 // a) they are supported by the CPU,
127 // b) XSAVE is supported by the CPU and 129 // b) XSAVE is supported by the CPU and
128 // c) XSAVE is enabled by the kernel. 130 // c) XSAVE is enabled by the kernel.
129 // See http://software.intel.com/en-us/blogs/2011/04/14/is-avx-enabled 131 // See http://software.intel.com/en-us/blogs/2011/04/14/is-avx-enabled
130 has_avx_ = 132 has_avx_ =
131 has_avx_hardware_ && 133 has_avx_hardware_ &&
132 (cpu_info[2] & 0x08000000) != 0 /* OSXSAVE */ && 134 (cpu_info[2] & 0x08000000) != 0 /* OSXSAVE */ &&
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170 if (has_sse42()) return SSE42; 172 if (has_sse42()) return SSE42;
171 if (has_sse41()) return SSE41; 173 if (has_sse41()) return SSE41;
172 if (has_ssse3()) return SSSE3; 174 if (has_ssse3()) return SSSE3;
173 if (has_sse3()) return SSE3; 175 if (has_sse3()) return SSE3;
174 if (has_sse2()) return SSE2; 176 if (has_sse2()) return SSE2;
175 if (has_sse()) return SSE; 177 if (has_sse()) return SSE;
176 return PENTIUM; 178 return PENTIUM;
177 } 179 }
178 180
179 } // namespace base 181 } // namespace base
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