Subzero: Emit functions and global initializers in a separate thread.

src/IceCfg.cpp

 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the Cfg class, including constant pool
@@ skipping 13 matching lines @@
 #include "IceTargetLowering.h"
 
 namespace Ice {
 
 ICE_TLS_DEFINE_FIELD(const Cfg *, Cfg, CurrentCfg);
 
 ArenaAllocator<> *getCurrentCfgAllocator() {
   return Cfg::getCurrentCfgAllocator();
 }
 
-Cfg::Cfg(GlobalContext *Ctx)
-    : Ctx(Ctx), VMask(Ctx->getVerbose()), FunctionName(""),
-      ReturnType(IceType_void), IsInternalLinkage(false), HasError(false),
-      FocusedTiming(false), ErrorMessage(""), Entry(nullptr),
+Cfg::Cfg(GlobalContext *Ctx, uint32_t SequenceNumber)
+    : Ctx(Ctx), SequenceNumber(SequenceNumber), VMask(Ctx->getVerbose()),
+      FunctionName(""), ReturnType(IceType_void), IsInternalLinkage(false),
+      HasError(false), FocusedTiming(false), ErrorMessage(""), Entry(nullptr),
       NextInstNumber(Inst::NumberInitial), Allocator(new ArenaAllocator<>()),
       Live(nullptr),
       Target(TargetLowering::createLowering(Ctx->getTargetArch(), this)),
       VMetadata(new VariablesMetadata(this)),
       TargetAssembler(
           TargetLowering::createAssembler(Ctx->getTargetArch(), this)),
       CurrentNode(nullptr) {
   assert(!Ctx->isIRGenerationDisabled() &&
          "Attempt to build cfg when IR generation disabled");
 }
@@ skipping 363 matching lines @@
   TimerMarker T(TimerStack::TT_doBranchOpt, this);
   for (auto I = Nodes.begin(), E = Nodes.end(); I != E; ++I) {
     auto NextNode = I;
     ++NextNode;
     (*I)->doBranchOpt(NextNode == E ? nullptr : *NextNode);
   }
 }
 
 // ======================== Dump routines ======================== //
 
-void Cfg::emitTextHeader(const IceString &MangledName) {
+// emitTextHeader() is not target-specific (apart from what is
+// abstracted by the Assembler), so it is defined here rather than in
+// the target lowering class.
+void Cfg::emitTextHeader(const IceString &MangledName, GlobalContext *Ctx,
+                         const Assembler *Asm) {
   // Note: Still used by emit IAS.
   Ostream &Str = Ctx->getStrEmit();
   Str << "\t.text\n";
   if (Ctx->getFlags().getFunctionSections())
     Str << "\t.section\t.text." << MangledName << ",\"ax\",@progbits\n";
-  if (!getInternal() || Ctx->getFlags().getDisableInternal()) {
+  if (!Asm->getInternal() || Ctx->getFlags().getDisableInternal()) {
     Str << "\t.globl\t" << MangledName << "\n";
     Str << "\t.type\t" << MangledName << ",@function\n";
   }
-  Assembler *Asm = getAssembler<Assembler>();
   Str << "\t.p2align " << Asm->getBundleAlignLog2Bytes() << ",0x";
   for (uint8_t I : Asm->getNonExecBundlePadding())
     Str.write_hex(I);
   Str << "\n";
   Str << MangledName << ":\n";
 }
 
 void Cfg::emit() {
   if (!ALLOW_DUMP)
     return;
   TimerMarker T(TimerStack::TT_emit, this);
   if (Ctx->getFlags().getDecorateAsm()) {
     renumberInstructions();
     getVMetadata()->init(VMK_Uses);
     liveness(Liveness_Basic);
     dump("After recomputing liveness for -decorate-asm");
   }
   OstreamLocker L(Ctx);
   Ostream &Str = Ctx->getStrEmit();
   IceString MangledName = getContext()->mangleName(getFunctionName());
-  emitTextHeader(MangledName);
+  emitTextHeader(MangledName, Ctx, getAssembler<>());
   for (CfgNode *Node : Nodes)
     Node->emit(this);
   Str << "\n";
 }
 
 void Cfg::emitIAS() {
   TimerMarker T(TimerStack::TT_emit, this);
   assert(!Ctx->getFlags().getDecorateAsm());
-  IceString MangledName = getContext()->mangleName(getFunctionName());
   // The emitIAS() routines emit into the internal assembler buffer,
-  // so there's no need to lock the streams until we're ready to call
-  // emitIASBytes().
+  // so there's no need to lock the streams.
   for (CfgNode *Node : Nodes)
     Node->emitIAS(this);
-  // Now write the function to the file and track.
-  if (Ctx->getFlags().getUseELFWriter()) {
-    getAssembler<Assembler>()->alignFunction();
-    Ctx->getObjectWriter()->writeFunctionCode(MangledName, getInternal(),
-                                              getAssembler<Assembler>());
-  } else {
-    OstreamLocker L(Ctx);
-    emitTextHeader(MangledName);
-    getAssembler<Assembler>()->emitIASBytes(Ctx);
-  }
 }
 
 // Dumps the IR with an optional introductory message.
 void Cfg::dump(const IceString &Message) {
   if (!ALLOW_DUMP)
     return;
   if (!isVerbose())
     return;
   OstreamLocker L(Ctx);
   Ostream &Str = Ctx->getStrDump();
@@ skipping 29 matching lines @@
     }
   }
   // Print each basic block
   for (CfgNode *Node : Nodes)
     Node->dump(this);
   if (isVerbose(IceV_Instructions))
     Str << "}\n";
 }
 
 } // end of namespace Ice