| Index: tests_lit/llvm2ice_tests/vector-cast.ll
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| diff --git a/tests_lit/llvm2ice_tests/vector-cast.ll b/tests_lit/llvm2ice_tests/vector-cast.ll
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| index 30d35780ec0776172eba6368786a9e8f5a4d7ea3..d46e5b82c146dc1c6eef70751bf5e6d61252c140 100644
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| --- a/tests_lit/llvm2ice_tests/vector-cast.ll
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| +++ b/tests_lit/llvm2ice_tests/vector-cast.ll
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| @@ -1,12 +1,10 @@
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|  ; This file tests casting / conversion operations that apply to vector types.
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|  ; bitcast operations are in vector-bitcast.ll.
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|  
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| -; RUN: %p2i -i %s --args -O2 --verbose none \
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| -; RUN:   | llvm-mc -triple=i686-none-nacl -filetype=obj \
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| -; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
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| -; RUN: %p2i -i %s --args -Om1 --verbose none \
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| -; RUN:   | llvm-mc -triple=i686-none-nacl -filetype=obj \
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| -; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
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| +; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
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| +; RUN:   | FileCheck %s
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| +; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \
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| +; RUN:   | FileCheck %s
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|  
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|  ; sext operations
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|  
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| @@ -15,7 +13,7 @@ entry:
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|    %res = sext <16 x i1> %arg to <16 x i8>
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|    ret <16 x i8> %res
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|  
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| -; CHECK-LABEL: test_sext_v16i1_to_v16i8:
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| +; CHECK-LABEL: test_sext_v16i1_to_v16i8
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|  ; CHECK: pxor
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|  ; CHECK: pcmpeqb
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|  ; CHECK: psubb
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| @@ -29,9 +27,9 @@ entry:
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|    %res = sext <8 x i1> %arg to <8 x i16>
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|    ret <8 x i16> %res
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|  
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| -; CHECK-LABEL: test_sext_v8i1_to_v8i16:
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| -; CHECK: psllw {{.*}}, 15
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| -; CHECK: psraw {{.*}}, 15
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| +; CHECK-LABEL: test_sext_v8i1_to_v8i16
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| +; CHECK: psllw {{.*}},0xf
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| +; CHECK: psraw {{.*}},0xf
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|  }
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|  
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|  define <4 x i32> @test_sext_v4i1_to_v4i32(<4 x i1> %arg) {
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| @@ -39,9 +37,9 @@ entry:
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|    %res = sext <4 x i1> %arg to <4 x i32>
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|    ret <4 x i32> %res
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|  
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| -; CHECK-LABEL: test_sext_v4i1_to_v4i32:
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| -; CHECK: pslld {{.*}}, 31
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| -; CHECK: psrad {{.*}}, 31
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| +; CHECK-LABEL: test_sext_v4i1_to_v4i32
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| +; CHECK: pslld {{.*}},0x1f
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| +; CHECK: psrad {{.*}},0x1f
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|  }
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|  
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|  ; zext operations
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| @@ -51,7 +49,7 @@ entry:
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|    %res = zext <16 x i1> %arg to <16 x i8>
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|    ret <16 x i8> %res
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|  
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| -; CHECK-LABEL: test_zext_v16i1_to_v16i8:
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| +; CHECK-LABEL: test_zext_v16i1_to_v16i8
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|  ; CHECK: pxor
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|  ; CHECK: pcmpeqb
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|  ; CHECK: psubb
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| @@ -63,7 +61,7 @@ entry:
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|    %res = zext <8 x i1> %arg to <8 x i16>
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|    ret <8 x i16> %res
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|  
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| -; CHECK-LABEL: test_zext_v8i1_to_v8i16:
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| +; CHECK-LABEL: test_zext_v8i1_to_v8i16
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|  ; CHECK: pxor
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|  ; CHECK: pcmpeqw
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|  ; CHECK: psubw
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| @@ -75,7 +73,7 @@ entry:
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|    %res = zext <4 x i1> %arg to <4 x i32>
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|    ret <4 x i32> %res
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|  
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| -; CHECK-LABEL: test_zext_v4i1_to_v4i32:
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| +; CHECK-LABEL: test_zext_v4i1_to_v4i32
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|  ; CHECK: pxor
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|  ; CHECK: pcmpeqd
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|  ; CHECK: psubd
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| @@ -89,7 +87,7 @@ entry:
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|    %res = trunc <16 x i8> %arg to <16 x i1>
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|    ret <16 x i1> %res
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|  
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| -; CHECK-LABEL: test_trunc_v16i8_to_v16i1:
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| +; CHECK-LABEL: test_trunc_v16i8_to_v16i1
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|  ; CHECK: pxor
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|  ; CHECK: pcmpeqb
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|  ; CHECK: psubb
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| @@ -101,7 +99,7 @@ entry:
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|    %res = trunc <8 x i16> %arg to <8 x i1>
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|    ret <8 x i1> %res
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|  
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| -; CHECK-LABEL: test_trunc_v8i16_to_v8i1:
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| +; CHECK-LABEL: test_trunc_v8i16_to_v8i1
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|  ; CHECK: pxor
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|  ; CHECK: pcmpeqw
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|  ; CHECK: psubw
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| @@ -113,7 +111,7 @@ entry:
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|    %res = trunc <4 x i32> %arg to <4 x i1>
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|    ret <4 x i1> %res
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|  
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| -; CHECK-LABEL: test_trunc_v4i32_to_v4i1:
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| +; CHECK-LABEL: test_trunc_v4i32_to_v4i1
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|  ; CHECK: pxor
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|  ; CHECK: pcmpeqd
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|  ; CHECK: psubd
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| @@ -127,7 +125,7 @@ entry:
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|    %res = fptosi <4 x float> %arg to <4 x i32>
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|    ret <4 x i32> %res
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|  
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| -; CHECK-LABEL: test_fptosi_v4f32_to_v4i32:
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| +; CHECK-LABEL: test_fptosi_v4f32_to_v4i32
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|  ; CHECK: cvttps2dq
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|  }
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|  
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| @@ -136,8 +134,8 @@ entry:
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|    %res = fptoui <4 x float> %arg to <4 x i32>
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|    ret <4 x i32> %res
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|  
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| -; CHECK-LABEL: test_fptoui_v4f32_to_v4i32:
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| -; CHECK: call Sz_fptoui_v4f32
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| +; CHECK-LABEL: test_fptoui_v4f32_to_v4i32
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| +; CHECK: call {{.*}} R_{{.*}} Sz_fptoui_v4f32
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|  }
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|  
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|  ; [su]itofp operations
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| @@ -147,7 +145,7 @@ entry:
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|    %res = sitofp <4 x i32> %arg to <4 x float>
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|    ret <4 x float> %res
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|  
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| -; CHECK-LABEL: test_sitofp_v4i32_to_v4f32:
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| +; CHECK-LABEL: test_sitofp_v4i32_to_v4f32
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|  ; CHECK: cvtdq2ps
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|  }
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|  
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| @@ -156,6 +154,6 @@ entry:
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|    %res = uitofp <4 x i32> %arg to <4 x float>
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|    ret <4 x float> %res
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|  
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| -; CHECK-LABEL: test_uitofp_v4i32_to_v4f32:
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| -; CHECK: call Sz_uitofp_v4i32
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| +; CHECK-LABEL: test_uitofp_v4i32_to_v4f32
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| +; CHECK: call {{.*}} R_{{.*}} Sz_uitofp_v4i32
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|  }
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| 
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