Subzero: switch from llvm-objdump to objdump for lit tests (for LLVM merge)

tests_lit/llvm2ice_tests/address-mode-opt.ll

Index: tests_lit/llvm2ice_tests/address-mode-opt.ll
diff --git a/tests_lit/llvm2ice_tests/address-mode-opt.ll b/tests_lit/llvm2ice_tests/address-mode-opt.ll
index 321945f8925105ca402f5e5ecd2286bb34d81492..6b40f26bb318d90b3b02d5d23f8d512204f19e82 100644
--- a/tests_lit/llvm2ice_tests/address-mode-opt.ll
+++ b/tests_lit/llvm2ice_tests/address-mode-opt.ll
@@ -1,12 +1,9 @@
 ; This file checks support for address mode optimization.
 
-; RUN: %p2i -i %s --args -O2 --verbose none \
-; RUN:   | llvm-mc -triple=i686-none-nacl -filetype=obj \
-; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
-; RUN: %p2i -i %s --args -O2 -mattr=sse4.1 --verbose none \
-; RUN:   | llvm-mc -triple=i686-none-nacl -filetype=obj \
-; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - \
-; RUN:   | FileCheck --check-prefix=SSE41 %s
+; RUN: %p2i --assemble --disassemble -i %s --args -O2 --verbose none \
+; RUN:   | FileCheck %s
+; RUN: %p2i --assemble --disassemble -i %s --args -O2 -mattr=sse4.1 \
+; RUN:   --verbose none | FileCheck --check-prefix=SSE41 %s
 
 define float @load_arg_plus_200000(float* %arg) {
 entry:
@@ -15,8 +12,8 @@ entry:
   %addr.ptr = inttoptr i32 %addr.int to float*
   %addr.load = load float* %addr.ptr, align 4
   ret float %addr.load
-; CHECK-LABEL: load_arg_plus_200000:
-; CHECK: movss xmm0, dword ptr [eax + 200000]
+; CHECK-LABEL: load_arg_plus_200000
+; CHECK: movss xmm0,DWORD PTR [eax+0x30d40]
 }
 
 define float @load_200000_plus_arg(float* %arg) {
@@ -26,8 +23,8 @@ entry:
   %addr.ptr = inttoptr i32 %addr.int to float*
   %addr.load = load float* %addr.ptr, align 4
   ret float %addr.load
-; CHECK-LABEL: load_200000_plus_arg:
-; CHECK: movss xmm0, dword ptr [eax + 200000]
+; CHECK-LABEL: load_200000_plus_arg
+; CHECK: movss xmm0,DWORD PTR [eax+0x30d40]
 }
 
 define float @load_arg_minus_200000(float* %arg) {
@@ -37,8 +34,8 @@ entry:
   %addr.ptr = inttoptr i32 %addr.int to float*
   %addr.load = load float* %addr.ptr, align 4
   ret float %addr.load
-; CHECK-LABEL: load_arg_minus_200000:
-; CHECK: movss xmm0, dword ptr [eax - 200000]
+; CHECK-LABEL: load_arg_minus_200000
+; CHECK: movss xmm0,DWORD PTR [eax-0x30d40]
 }
 
 define float @load_200000_minus_arg(float* %arg) {
@@ -48,8 +45,8 @@ entry:
   %addr.ptr = inttoptr i32 %addr.int to float*
   %addr.load = load float* %addr.ptr, align 4
   ret float %addr.load
-; CHECK-LABEL: load_200000_minus_arg:
-; CHECK: movss xmm0, dword ptr [e{{..}}]
+; CHECK-LABEL: load_200000_minus_arg
+; CHECK: movss xmm0,DWORD PTR [e{{..}}]
 }
 
 define <8 x i16> @load_mul_v8i16_mem(<8 x i16> %arg0, i32 %arg1_iptr) {
@@ -59,8 +56,8 @@ entry:
   %arg1 = load <8 x i16>* %addr_ptr, align 2
   %res_vec = mul <8 x i16> %arg0, %arg1
   ret <8 x i16> %res_vec
-; CHECK-LABEL: load_mul_v8i16_mem:
-; CHECK: pmullw xmm{{.*}}, xmmword ptr [e{{.*}} - 200000]
+; CHECK-LABEL: load_mul_v8i16_mem
+; CHECK: pmullw xmm{{.*}},XMMWORD PTR [e{{.*}}-0x30d40]
 }
 
 define <4 x i32> @load_mul_v4i32_mem(<4 x i32> %arg0, i32 %arg1_iptr) {
@@ -70,12 +67,12 @@ entry:
   %arg1 = load <4 x i32>* %addr_ptr, align 4
   %res = mul <4 x i32> %arg0, %arg1
   ret <4 x i32> %res
-; CHECK-LABEL: load_mul_v4i32_mem:
-; CHECK: pmuludq xmm{{.*}}, xmmword ptr [e{{.*}} - 200000]
+; CHECK-LABEL: load_mul_v4i32_mem
+; CHECK: pmuludq xmm{{.*}},XMMWORD PTR [e{{.*}}-0x30d40]
 ; CHECK: pmuludq
 ;
-; SSE41-LABEL: load_mul_v4i32_mem:
-; SSE41: pmulld xmm{{.*}}, xmmword ptr [e{{.*}} - 200000]
+; SSE41-LABEL: load_mul_v4i32_mem
+; SSE41: pmulld xmm{{.*}},XMMWORD PTR [e{{.*}}-0x30d40]
 }
 
 define float @address_mode_opt_chaining(float* %arg) {
@@ -86,8 +83,8 @@ entry:
   %addr2.ptr = inttoptr i32 %addr2.int to float*
   %addr2.load = load float* %addr2.ptr, align 4
   ret float %addr2.load
-; CHECK-LABEL: address_mode_opt_chaining:
-; CHECK: movss xmm0, dword ptr [eax + 8]
+; CHECK-LABEL: address_mode_opt_chaining
+; CHECK: movss xmm0,DWORD PTR [eax+0x8]
 }
 
 define float @address_mode_opt_chaining_overflow(float* %arg) {
@@ -98,9 +95,9 @@ entry:
   %addr2.ptr = inttoptr i32 %addr2.int to float*
   %addr2.load = load float* %addr2.ptr, align 4
   ret float %addr2.load
-; CHECK-LABEL: address_mode_opt_chaining_overflow:
-; CHECK: 2147483640
-; CHECK: movss xmm0, dword ptr [{{.*}} + 2147483643]
+; CHECK-LABEL: address_mode_opt_chaining_overflow
+; CHECK: 0x7ffffff8
+; CHECK: movss xmm0,DWORD PTR [{{.*}}+0x7ffffffb]
 }
 
 define float @address_mode_opt_chaining_overflow_sub(float* %arg) {
@@ -111,9 +108,9 @@ entry:
   %addr2.ptr = inttoptr i32 %addr2.int to float*
   %addr2.load = load float* %addr2.ptr, align 4
   ret float %addr2.load
-; CHECK-LABEL: address_mode_opt_chaining_overflow_sub:
-; CHECK: 2147483640
-; CHECK: movss xmm0, dword ptr [{{.*}} - 2147483643]
+; CHECK-LABEL: address_mode_opt_chaining_overflow_sub
+; CHECK: 0x7ffffff8
+; CHECK: movss xmm0,DWORD PTR [{{.*}}-0x7ffffffb]
 }
 
 define float @address_mode_opt_chaining_no_overflow(float* %arg) {
@@ -124,8 +121,8 @@ entry:
   %addr2.ptr = inttoptr i32 %addr2.int to float*
   %addr2.load = load float* %addr2.ptr, align 4
   ret float %addr2.load
-; CHECK-LABEL: address_mode_opt_chaining_no_overflow:
-; CHECK: movss xmm0, dword ptr [{{.*}} + 3]
+; CHECK-LABEL: address_mode_opt_chaining_no_overflow
+; CHECK: movss xmm0,DWORD PTR [{{.*}}+0x3]
 }
 
 define float @address_mode_opt_add_pos_min_int(float* %arg) {
@@ -135,8 +132,8 @@ entry:
   %addr1.ptr = inttoptr i32 %addr1.int to float*
   %addr1.load = load float* %addr1.ptr, align 4
   ret float %addr1.load
-; CHECK-LABEL: address_mode_opt_add_pos_min_int:
-; CHECK: movss xmm0, dword ptr [{{.*}} - 2147483648]
+; CHECK-LABEL: address_mode_opt_add_pos_min_int
+; CHECK: movss xmm0,DWORD PTR [{{.*}}-0x80000000]
 }
 
 define float @address_mode_opt_sub_min_int(float* %arg) {
@@ -146,6 +143,6 @@ entry:
   %addr1.ptr = inttoptr i32 %addr1.int to float*
   %addr1.load = load float* %addr1.ptr, align 4
   ret float %addr1.load
-; CHECK-LABEL: address_mode_opt_sub_min_int:
-; CHECK: movss xmm0, dword ptr [{{.*}} - 2147483648]
+; CHECK-LABEL: address_mode_opt_sub_min_int
+; CHECK: movss xmm0,DWORD PTR [{{.*}}-0x80000000]
 }