| Index: tests_lit/llvm2ice_tests/test_i1.ll
|
| diff --git a/tests_lit/llvm2ice_tests/test_i1.ll b/tests_lit/llvm2ice_tests/test_i1.ll
|
| index dd1d9c26dc1293a38a17f4a63f54490aebcdccd9..268071574c0d4dce105896eb6f91a478f70756fd 100644
|
| --- a/tests_lit/llvm2ice_tests/test_i1.ll
|
| +++ b/tests_lit/llvm2ice_tests/test_i1.ll
|
| @@ -1,11 +1,9 @@
|
| ; Tests various aspects of i1 related lowering.
|
|
|
| -; RUN: %p2i -i %s -a -O2 --verbose none \
|
| -; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \
|
| -; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
|
| -; RUN: %p2i -i %s -a -Om1 --verbose none \
|
| -; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \
|
| -; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
|
| +; RUN: %p2i -i %s --assemble --disassemble -a -O2 --verbose none \
|
| +; RUN: | FileCheck %s
|
| +; RUN: %p2i -i %s --assemble --disassemble -a -Om1 --verbose none \
|
| +; RUN: | FileCheck %s
|
|
|
| ; Test that and with true uses immediate 1, not -1.
|
| define internal i32 @testAndTrue(i32 %arg) {
|
| @@ -76,7 +74,7 @@ entry:
|
| ; match the trunc instruction
|
| ; CHECK: and {{.*}}, 1
|
| ; match the zext i1 instruction (note 32-bit reg is used because it's shorter).
|
| -; CHECK: movzx [[REG:e.*]], {{[a-d]l|byte ptr}}
|
| +; CHECK: movzx [[REG:e.*]],{{[a-d]l|BYTE PTR}}
|
| ; CHECK: and [[REG]], 1
|
|
|
| ; Test zext to i32.
|
| @@ -106,7 +104,7 @@ entry:
|
| ; match the zext i1 instruction
|
| ; CHECK: movzx
|
| ; CHECK: and {{.*}}, 1
|
| -; CHECK: mov {{.*}}, 0
|
| +; CHECK: mov {{.*}},0
|
|
|
| ; Test sext to i8.
|
| define internal i32 @testSextI8(i32 %arg) {
|
| @@ -135,7 +133,7 @@ entry:
|
| ; match the trunc instruction
|
| ; CHECK: and {{.*}}, 1
|
| ; match the sext i1 instruction
|
| -; CHECK: movzx e[[REG:.*]], {{[a-d]l|byte ptr}}
|
| +; CHECK: movzx e[[REG:.*]],{{[a-d]l|BYTE PTR}}
|
| ; CHECK-NEXT: shl [[REG]], 15
|
| ; CHECK-NEXT: sar [[REG]], 15
|
|
|
|
|