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Side by Side Diff: tests_lit/llvm2ice_tests/switch-opt.ll

Issue 914263005: Subzero: switch from llvm-objdump to objdump for lit tests (for LLVM merge) (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: fix some line wrap Created 5 years, 10 months ago
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1 ; This tests a switch statement, including multiple branches to the 1 ; This tests a switch statement, including multiple branches to the
2 ; same label which also results in phi instructions with multiple 2 ; same label which also results in phi instructions with multiple
3 ; entries for the same incoming edge. 3 ; entries for the same incoming edge.
4 4
5 ; RUN: %p2i -i %s --args -O2 --verbose none \ 5 ; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \
6 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ 6 ; RUN: | FileCheck %s
7 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
8 7
9 define i32 @testSwitch(i32 %a) { 8 define i32 @testSwitch(i32 %a) {
10 entry: 9 entry:
11 switch i32 %a, label %sw.default [ 10 switch i32 %a, label %sw.default [
12 i32 1, label %sw.epilog 11 i32 1, label %sw.epilog
13 i32 2, label %sw.epilog 12 i32 2, label %sw.epilog
14 i32 3, label %sw.epilog 13 i32 3, label %sw.epilog
15 i32 7, label %sw.bb1 14 i32 7, label %sw.bb1
16 i32 8, label %sw.bb1 15 i32 8, label %sw.bb1
17 i32 15, label %sw.bb2 16 i32 15, label %sw.bb2
(...skipping 24 matching lines...) Expand all
42 define i32 @testSwitchImm() { 41 define i32 @testSwitchImm() {
43 entry: 42 entry:
44 switch i32 10, label %sw.default [ 43 switch i32 10, label %sw.default [
45 i32 1, label %sw.default 44 i32 1, label %sw.default
46 ] 45 ]
47 46
48 sw.default: 47 sw.default:
49 ret i32 20 48 ret i32 20
50 } 49 }
51 ; CHECK-LABEL: testSwitchImm 50 ; CHECK-LABEL: testSwitchImm
52 ; CHECK-NOT: cmp {{[0-9]*}}, 51 ; CHECK-NOT: cmp 0x{{[0-9a-f]*}},
53 52
54 ; Test for correct 64-bit lowering. 53 ; Test for correct 64-bit lowering.
55 define internal i32 @testSwitch64(i64 %a) { 54 define internal i32 @testSwitch64(i64 %a) {
56 entry: 55 entry:
57 switch i64 %a, label %sw.default [ 56 switch i64 %a, label %sw.default [
58 i64 123, label %return 57 i64 123, label %return
59 i64 234, label %sw.bb1 58 i64 234, label %sw.bb1
60 i64 345, label %sw.bb2 59 i64 345, label %sw.bb2
61 i64 78187493520, label %sw.bb3 60 i64 78187493520, label %sw.bb3
62 ] 61 ]
63 62
64 sw.bb1: ; preds = %entry 63 sw.bb1: ; preds = %entry
65 br label %return 64 br label %return
66 65
67 sw.bb2: ; preds = %entry 66 sw.bb2: ; preds = %entry
68 br label %return 67 br label %return
69 68
70 sw.bb3: ; preds = %entry 69 sw.bb3: ; preds = %entry
71 br label %return 70 br label %return
72 71
73 sw.default: ; preds = %entry 72 sw.default: ; preds = %entry
74 br label %return 73 br label %return
75 74
76 return: ; preds = %sw.default, %sw.bb3 , %sw.bb2, %sw.bb1, %entry 75 return: ; preds = %sw.default, %sw.bb3 , %sw.bb2, %sw.bb1, %entry
77 %retval.0 = phi i32 [ 5, %sw.default ], [ 4, %sw.bb3 ], [ 3, %sw.bb2 ], [ 2, % sw.bb1 ], [ 1, %entry ] 76 %retval.0 = phi i32 [ 5, %sw.default ], [ 4, %sw.bb3 ], [ 3, %sw.bb2 ], [ 2, % sw.bb1 ], [ 1, %entry ]
78 ret i32 %retval.0 77 ret i32 %retval.0
79 } 78 }
80 ; CHECK-LABEL: testSwitch64 79 ; CHECK-LABEL: testSwitch64
81 ; CHECK: cmp {{.*}}, 123 80 ; CHECK: cmp {{.*}},0x7b
82 ; CHECK-NEXT: jne 81 ; CHECK-NEXT: jne
83 ; CHECK-NEXT: cmp {{.*}}, 0 82 ; CHECK-NEXT: cmp {{.*}},0x0
84 ; CHECK-NEXT: je 83 ; CHECK-NEXT: je
85 ; CHECK: cmp {{.*}}, 234 84 ; CHECK: cmp {{.*}},0xea
86 ; CHECK-NEXT: jne 85 ; CHECK-NEXT: jne
87 ; CHECK-NEXT: cmp {{.*}}, 0 86 ; CHECK-NEXT: cmp {{.*}},0x0
88 ; CHECK-NEXT: je 87 ; CHECK-NEXT: je
89 ; CHECK: cmp {{.*}}, 345 88 ; CHECK: cmp {{.*}},0x159
90 ; CHECK-NEXT: jne 89 ; CHECK-NEXT: jne
91 ; CHECK-NEXT: cmp {{.*}}, 0 90 ; CHECK-NEXT: cmp {{.*}},0x0
92 ; CHECK-NEXT: je 91 ; CHECK-NEXT: je
93 ; CHECK: cmp {{.*}}, 878082192 92 ; CHECK: cmp {{.*}},0x34567890
94 ; CHECK-NEXT: jne 93 ; CHECK-NEXT: jne
95 ; CHECK-NEXT: cmp {{.*}}, 18 94 ; CHECK-NEXT: cmp {{.*}},0x12
96 ; CHECK-NEXT: je 95 ; CHECK-NEXT: je
97 96
98 ; Similar to testSwitchImm, make sure proper addressing modes are 97 ; Similar to testSwitchImm, make sure proper addressing modes are
99 ; used. In reality, this is tested by running the output through the 98 ; used. In reality, this is tested by running the output through the
100 ; assembler. 99 ; assembler.
101 define i32 @testSwitchImm64() { 100 define i32 @testSwitchImm64() {
102 entry: 101 entry:
103 switch i64 10, label %sw.default [ 102 switch i64 10, label %sw.default [
104 i64 1, label %sw.default 103 i64 1, label %sw.default
105 ] 104 ]
106 105
107 sw.default: 106 sw.default:
108 ret i32 20 107 ret i32 20
109 } 108 }
110 ; CHECK-LABEL: testSwitchImm64 109 ; CHECK-LABEL: testSwitchImm64
111 ; CHECK: cmp {{.*}}, 1 110 ; CHECK: cmp {{.*}},0x1
112 ; CHECK-NEXT: jne 111 ; CHECK-NEXT: jne
113 ; CHECK-NEXT: cmp {{.*}}, 0 112 ; CHECK-NEXT: cmp {{.*}},0x0
114 ; CHECK-NEXT: je 113 ; CHECK-NEXT: je
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