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1 ; This tests a simple loop that sums the elements of an input array. | 1 ; This tests a simple loop that sums the elements of an input array. |
2 ; The O2 check patterns represent the best code currently achieved. | 2 ; The O2 check patterns represent the best code currently achieved. |
3 | 3 |
4 ; RUN: %p2i -i %s --args -O2 --verbose none \ | 4 ; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \ |
5 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | 5 ; RUN: | FileCheck %s |
6 ; RUN: | llvm-objdump -d -symbolize -x86-asm-syntax=intel - | FileCheck %s | 6 ; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \ |
7 ; RUN: %p2i -i %s --args -Om1 --verbose none \ | |
8 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | |
9 ; RUN: | llvm-objdump -d -symbolize -x86-asm-syntax=intel - \ | |
10 ; RUN: | FileCheck --check-prefix=OPTM1 %s | 7 ; RUN: | FileCheck --check-prefix=OPTM1 %s |
11 | 8 |
12 define i32 @simple_loop(i32 %a, i32 %n) { | 9 define i32 @simple_loop(i32 %a, i32 %n) { |
13 entry: | 10 entry: |
14 %cmp4 = icmp sgt i32 %n, 0 | 11 %cmp4 = icmp sgt i32 %n, 0 |
15 br i1 %cmp4, label %for.body, label %for.end | 12 br i1 %cmp4, label %for.body, label %for.end |
16 | 13 |
17 for.body: | 14 for.body: |
18 %i.06 = phi i32 [ %inc, %for.body ], [ 0, %entry ] | 15 %i.06 = phi i32 [ %inc, %for.body ], [ 0, %entry ] |
19 %sum.05 = phi i32 [ %add, %for.body ], [ 0, %entry ] | 16 %sum.05 = phi i32 [ %add, %for.body ], [ 0, %entry ] |
20 %gep_array = mul i32 %i.06, 4 | 17 %gep_array = mul i32 %i.06, 4 |
21 %gep = add i32 %a, %gep_array | 18 %gep = add i32 %a, %gep_array |
22 %__9 = inttoptr i32 %gep to i32* | 19 %__9 = inttoptr i32 %gep to i32* |
23 %v0 = load i32* %__9, align 1 | 20 %v0 = load i32* %__9, align 1 |
24 %add = add i32 %v0, %sum.05 | 21 %add = add i32 %v0, %sum.05 |
25 %inc = add i32 %i.06, 1 | 22 %inc = add i32 %i.06, 1 |
26 %cmp = icmp slt i32 %inc, %n | 23 %cmp = icmp slt i32 %inc, %n |
27 br i1 %cmp, label %for.body, label %for.end | 24 br i1 %cmp, label %for.body, label %for.end |
28 | 25 |
29 for.end: | 26 for.end: |
30 %sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ] | 27 %sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ] |
31 ret i32 %sum.0.lcssa | 28 ret i32 %sum.0.lcssa |
32 } | 29 } |
33 | 30 |
34 ; CHECK-LABEL: simple_loop | 31 ; CHECK-LABEL: simple_loop |
35 ; CHECK: mov ecx, dword ptr [esp{{.*}}+{{.*}}{{[0-9]+}}] | 32 ; CHECK: mov ecx,DWORD PTR [esp{{.*}}+0x{{[0-9a-f]+}}] |
36 ; CHECK: cmp ecx, 0 | 33 ; CHECK: cmp ecx,0x0 |
37 ; CHECK-NEXT: j{{le|g}} {{[0-9]}} | 34 ; CHECK-NEXT: j{{le|g}} {{[0-9]}} |
38 | 35 |
39 ; Check for the combination of address mode inference, register | 36 ; Check for the combination of address mode inference, register |
40 ; allocation, and load/arithmetic fusing. | 37 ; allocation, and load/arithmetic fusing. |
41 ; CHECK: add e{{..}}, dword ptr [e{{..}} + 4*[[IREG:e..]]] | 38 ; CHECK: [[L:[0-9a-f]+]]{{.*}} add e{{..}},DWORD PTR [e{{..}}+[[IREG:e..]]*4] |
42 ; Check for incrementing of the register-allocated induction variable. | 39 ; Check for incrementing of the register-allocated induction variable. |
43 ; CHECK-NEXT: add [[IREG]], 1 | 40 ; CHECK-NEXT: add [[IREG]],0x1 |
44 ; Check for comparing the induction variable against the loop size. | 41 ; Check for comparing the induction variable against the loop size. |
45 ; CHECK-NEXT: cmp [[IREG]], | 42 ; CHECK-NEXT: cmp [[IREG]], |
46 ; CHECK-NEXT: jl -{{[0-9]}} | 43 ; CHECK-NEXT: jl [[L]] |
47 ; | 44 ; |
48 ; There's nothing remarkable under Om1 to test for, since Om1 generates | 45 ; There's nothing remarkable under Om1 to test for, since Om1 generates |
49 ; such atrocious code (by design). | 46 ; such atrocious code (by design). |
50 ; OPTM1-LABEL: simple_loop | 47 ; OPTM1-LABEL: simple_loop |
51 ; OPTM1: cmp {{.*}}, 0 | 48 ; OPTM1: cmp {{.*}},0x0 |
52 ; OPTM1: jg | 49 ; OPTM1: jg |
53 ; OPTM1: ret | 50 ; OPTM1: ret |
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