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| 1 ; This file tests bitcasts of vector type. For most operations, these | 1 ; This file tests bitcasts of vector type. For most operations, these |
| 2 ; should be lowered to a no-op on -O2. | 2 ; should be lowered to a no-op on -O2. |
| 3 | 3 |
| 4 ; RUN: %p2i -i %s --args -O2 --verbose none \ | 4 ; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \ |
| 5 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | 5 ; RUN: | FileCheck %s |
| 6 ; RUN: | llvm-objdump -d -symbolize -x86-asm-syntax=intel - | FileCheck %s | 6 ; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \ |
| 7 ; RUN: %p2i -i %s --args -Om1 --verbose none \ | |
| 8 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | |
| 9 ; RUN: | llvm-objdump -d -symbolize -x86-asm-syntax=intel - \ | |
| 10 ; RUN: | FileCheck --check-prefix=OPTM1 %s | 7 ; RUN: | FileCheck --check-prefix=OPTM1 %s |
| 11 | 8 |
| 12 define <16 x i8> @test_bitcast_v16i8_to_v16i8(<16 x i8> %arg) { | 9 define <16 x i8> @test_bitcast_v16i8_to_v16i8(<16 x i8> %arg) { |
| 13 entry: | 10 entry: |
| 14 %res = bitcast <16 x i8> %arg to <16 x i8> | 11 %res = bitcast <16 x i8> %arg to <16 x i8> |
| 15 ret <16 x i8> %res | 12 ret <16 x i8> %res |
| 16 | 13 |
| 17 ; CHECK-LABEL: test_bitcast_v16i8_to_v16i8 | 14 ; CHECK-LABEL: test_bitcast_v16i8_to_v16i8 |
| 18 ; CHECK-NEXT: ret | 15 ; CHECK-NEXT: ret |
| 19 } | 16 } |
| 20 | 17 |
| 21 define <8 x i16> @test_bitcast_v16i8_to_v8i16(<16 x i8> %arg) { | 18 define <8 x i16> @test_bitcast_v16i8_to_v8i16(<16 x i8> %arg) { |
| 22 entry: | 19 entry: |
| 23 %res = bitcast <16 x i8> %arg to <8 x i16> | 20 %res = bitcast <16 x i8> %arg to <8 x i16> |
| 24 ret <8 x i16> %res | 21 ret <8 x i16> %res |
| 25 | 22 |
| 26 ; CHECK-LABEL: test_bitcast_v16i8_to_v8i16 | 23 ; CHECK-LABEL: test_bitcast_v16i8_to_v8i16 |
| 27 ; CHECK-NEXT: ret | 24 ; CHECK-NEXT: ret |
| 28 } | 25 } |
| 29 | 26 |
| 30 define <4 x i32> @test_bitcast_v16i8_to_v4i32(<16 x i8> %arg) { | 27 define <4 x i32> @test_bitcast_v16i8_to_v4i32(<16 x i8> %arg) { |
| 31 entry: | 28 entry: |
| 32 %res = bitcast <16 x i8> %arg to <4 x i32> | 29 %res = bitcast <16 x i8> %arg to <4 x i32> |
| 33 ret <4 x i32> %res | 30 ret <4 x i32> %res |
| 34 | 31 |
| 35 ; CHECK-LABEL: test_bitcast_v16i8_to_v4i32: | 32 ; CHECK-LABEL: test_bitcast_v16i8_to_v4i32 |
| 36 ; CHECK-NEXT: ret | 33 ; CHECK-NEXT: ret |
| 37 } | 34 } |
| 38 | 35 |
| 39 define <4 x float> @test_bitcast_v16i8_to_v4f32(<16 x i8> %arg) { | 36 define <4 x float> @test_bitcast_v16i8_to_v4f32(<16 x i8> %arg) { |
| 40 entry: | 37 entry: |
| 41 %res = bitcast <16 x i8> %arg to <4 x float> | 38 %res = bitcast <16 x i8> %arg to <4 x float> |
| 42 ret <4 x float> %res | 39 ret <4 x float> %res |
| 43 | 40 |
| 44 ; CHECK-LABEL: test_bitcast_v16i8_to_v4f32: | 41 ; CHECK-LABEL: test_bitcast_v16i8_to_v4f32 |
| 45 ; CHECK-NEXT: ret | 42 ; CHECK-NEXT: ret |
| 46 } | 43 } |
| 47 | 44 |
| 48 define <16 x i8> @test_bitcast_v8i16_to_v16i8(<8 x i16> %arg) { | 45 define <16 x i8> @test_bitcast_v8i16_to_v16i8(<8 x i16> %arg) { |
| 49 entry: | 46 entry: |
| 50 %res = bitcast <8 x i16> %arg to <16 x i8> | 47 %res = bitcast <8 x i16> %arg to <16 x i8> |
| 51 ret <16 x i8> %res | 48 ret <16 x i8> %res |
| 52 | 49 |
| 53 ; CHECK-LABEL: test_bitcast_v8i16_to_v16i8: | 50 ; CHECK-LABEL: test_bitcast_v8i16_to_v16i8 |
| 54 ; CHECK-NEXT: ret | 51 ; CHECK-NEXT: ret |
| 55 } | 52 } |
| 56 | 53 |
| 57 define <8 x i16> @test_bitcast_v8i16_to_v8i16(<8 x i16> %arg) { | 54 define <8 x i16> @test_bitcast_v8i16_to_v8i16(<8 x i16> %arg) { |
| 58 entry: | 55 entry: |
| 59 %res = bitcast <8 x i16> %arg to <8 x i16> | 56 %res = bitcast <8 x i16> %arg to <8 x i16> |
| 60 ret <8 x i16> %res | 57 ret <8 x i16> %res |
| 61 | 58 |
| 62 ; CHECK-LABEL: test_bitcast_v8i16_to_v8i16: | 59 ; CHECK-LABEL: test_bitcast_v8i16_to_v8i16 |
| 63 ; CHECK-NEXT: ret | 60 ; CHECK-NEXT: ret |
| 64 } | 61 } |
| 65 | 62 |
| 66 define <4 x i32> @test_bitcast_v8i16_to_v4i32(<8 x i16> %arg) { | 63 define <4 x i32> @test_bitcast_v8i16_to_v4i32(<8 x i16> %arg) { |
| 67 entry: | 64 entry: |
| 68 %res = bitcast <8 x i16> %arg to <4 x i32> | 65 %res = bitcast <8 x i16> %arg to <4 x i32> |
| 69 ret <4 x i32> %res | 66 ret <4 x i32> %res |
| 70 | 67 |
| 71 ; CHECK-LABEL: test_bitcast_v8i16_to_v4i32: | 68 ; CHECK-LABEL: test_bitcast_v8i16_to_v4i32 |
| 72 ; CHECK-NEXT: ret | 69 ; CHECK-NEXT: ret |
| 73 } | 70 } |
| 74 | 71 |
| 75 define <4 x float> @test_bitcast_v8i16_to_v4f32(<8 x i16> %arg) { | 72 define <4 x float> @test_bitcast_v8i16_to_v4f32(<8 x i16> %arg) { |
| 76 entry: | 73 entry: |
| 77 %res = bitcast <8 x i16> %arg to <4 x float> | 74 %res = bitcast <8 x i16> %arg to <4 x float> |
| 78 ret <4 x float> %res | 75 ret <4 x float> %res |
| 79 | 76 |
| 80 ; CHECK-LABEL: test_bitcast_v8i16_to_v4f32: | 77 ; CHECK-LABEL: test_bitcast_v8i16_to_v4f32 |
| 81 ; CHECK-NEXT: ret | 78 ; CHECK-NEXT: ret |
| 82 } | 79 } |
| 83 | 80 |
| 84 define <16 x i8> @test_bitcast_v4i32_to_v16i8(<4 x i32> %arg) { | 81 define <16 x i8> @test_bitcast_v4i32_to_v16i8(<4 x i32> %arg) { |
| 85 entry: | 82 entry: |
| 86 %res = bitcast <4 x i32> %arg to <16 x i8> | 83 %res = bitcast <4 x i32> %arg to <16 x i8> |
| 87 ret <16 x i8> %res | 84 ret <16 x i8> %res |
| 88 | 85 |
| 89 ; CHECK-LABEL: test_bitcast_v4i32_to_v16i8: | 86 ; CHECK-LABEL: test_bitcast_v4i32_to_v16i8 |
| 90 ; CHECK-NEXT: ret | 87 ; CHECK-NEXT: ret |
| 91 } | 88 } |
| 92 | 89 |
| 93 define <8 x i16> @test_bitcast_v4i32_to_v8i16(<4 x i32> %arg) { | 90 define <8 x i16> @test_bitcast_v4i32_to_v8i16(<4 x i32> %arg) { |
| 94 entry: | 91 entry: |
| 95 %res = bitcast <4 x i32> %arg to <8 x i16> | 92 %res = bitcast <4 x i32> %arg to <8 x i16> |
| 96 ret <8 x i16> %res | 93 ret <8 x i16> %res |
| 97 | 94 |
| 98 ; CHECK-LABEL: test_bitcast_v4i32_to_v8i16: | 95 ; CHECK-LABEL: test_bitcast_v4i32_to_v8i16 |
| 99 ; CHECK-NEXT: ret | 96 ; CHECK-NEXT: ret |
| 100 } | 97 } |
| 101 | 98 |
| 102 define <4 x i32> @test_bitcast_v4i32_to_v4i32(<4 x i32> %arg) { | 99 define <4 x i32> @test_bitcast_v4i32_to_v4i32(<4 x i32> %arg) { |
| 103 entry: | 100 entry: |
| 104 %res = bitcast <4 x i32> %arg to <4 x i32> | 101 %res = bitcast <4 x i32> %arg to <4 x i32> |
| 105 ret <4 x i32> %res | 102 ret <4 x i32> %res |
| 106 | 103 |
| 107 ; CHECK-LABEL: test_bitcast_v4i32_to_v4i32: | 104 ; CHECK-LABEL: test_bitcast_v4i32_to_v4i32 |
| 108 ; CHECK-NEXT: ret | 105 ; CHECK-NEXT: ret |
| 109 } | 106 } |
| 110 | 107 |
| 111 define <4 x float> @test_bitcast_v4i32_to_v4f32(<4 x i32> %arg) { | 108 define <4 x float> @test_bitcast_v4i32_to_v4f32(<4 x i32> %arg) { |
| 112 entry: | 109 entry: |
| 113 %res = bitcast <4 x i32> %arg to <4 x float> | 110 %res = bitcast <4 x i32> %arg to <4 x float> |
| 114 ret <4 x float> %res | 111 ret <4 x float> %res |
| 115 | 112 |
| 116 ; CHECK-LABEL: test_bitcast_v4i32_to_v4f32: | 113 ; CHECK-LABEL: test_bitcast_v4i32_to_v4f32 |
| 117 ; CHECK-NEXT: ret | 114 ; CHECK-NEXT: ret |
| 118 } | 115 } |
| 119 | 116 |
| 120 define <16 x i8> @test_bitcast_v4f32_to_v16i8(<4 x float> %arg) { | 117 define <16 x i8> @test_bitcast_v4f32_to_v16i8(<4 x float> %arg) { |
| 121 entry: | 118 entry: |
| 122 %res = bitcast <4 x float> %arg to <16 x i8> | 119 %res = bitcast <4 x float> %arg to <16 x i8> |
| 123 ret <16 x i8> %res | 120 ret <16 x i8> %res |
| 124 | 121 |
| 125 ; CHECK-LABEL: test_bitcast_v4f32_to_v16i8: | 122 ; CHECK-LABEL: test_bitcast_v4f32_to_v16i8 |
| 126 ; CHECK-NEXT: ret | 123 ; CHECK-NEXT: ret |
| 127 } | 124 } |
| 128 | 125 |
| 129 define <8 x i16> @test_bitcast_v4f32_to_v8i16(<4 x float> %arg) { | 126 define <8 x i16> @test_bitcast_v4f32_to_v8i16(<4 x float> %arg) { |
| 130 entry: | 127 entry: |
| 131 %res = bitcast <4 x float> %arg to <8 x i16> | 128 %res = bitcast <4 x float> %arg to <8 x i16> |
| 132 ret <8 x i16> %res | 129 ret <8 x i16> %res |
| 133 | 130 |
| 134 ; CHECK-LABEL: test_bitcast_v4f32_to_v8i16: | 131 ; CHECK-LABEL: test_bitcast_v4f32_to_v8i16 |
| 135 ; CHECK-NEXT: ret | 132 ; CHECK-NEXT: ret |
| 136 } | 133 } |
| 137 | 134 |
| 138 define <4 x i32> @test_bitcast_v4f32_to_v4i32(<4 x float> %arg) { | 135 define <4 x i32> @test_bitcast_v4f32_to_v4i32(<4 x float> %arg) { |
| 139 entry: | 136 entry: |
| 140 %res = bitcast <4 x float> %arg to <4 x i32> | 137 %res = bitcast <4 x float> %arg to <4 x i32> |
| 141 ret <4 x i32> %res | 138 ret <4 x i32> %res |
| 142 | 139 |
| 143 ; CHECK-LABEL: test_bitcast_v4f32_to_v4i32: | 140 ; CHECK-LABEL: test_bitcast_v4f32_to_v4i32 |
| 144 ; CHECK-NEXT: ret | 141 ; CHECK-NEXT: ret |
| 145 } | 142 } |
| 146 | 143 |
| 147 define <4 x float> @test_bitcast_v4f32_to_v4f32(<4 x float> %arg) { | 144 define <4 x float> @test_bitcast_v4f32_to_v4f32(<4 x float> %arg) { |
| 148 entry: | 145 entry: |
| 149 %res = bitcast <4 x float> %arg to <4 x float> | 146 %res = bitcast <4 x float> %arg to <4 x float> |
| 150 ret <4 x float> %res | 147 ret <4 x float> %res |
| 151 | 148 |
| 152 ; CHECK-LABEL: test_bitcast_v4f32_to_v4f32: | 149 ; CHECK-LABEL: test_bitcast_v4f32_to_v4f32 |
| 153 ; CHECK-NEXT: ret | 150 ; CHECK-NEXT: ret |
| 154 } | 151 } |
| 155 | 152 |
| 156 define i8 @test_bitcast_v8i1_to_i8(<8 x i1> %arg) { | 153 define i8 @test_bitcast_v8i1_to_i8(<8 x i1> %arg) { |
| 157 entry: | 154 entry: |
| 158 %res = bitcast <8 x i1> %arg to i8 | 155 %res = bitcast <8 x i1> %arg to i8 |
| 159 ret i8 %res | 156 ret i8 %res |
| 160 | 157 |
| 161 ; CHECK-LABEL: test_bitcast_v8i1_to_i8: | 158 ; CHECK-LABEL: test_bitcast_v8i1_to_i8 |
| 162 ; CHECK: call Sz_bitcast_v8i1_to_i8 | 159 ; CHECK: call |
| 160 ; CHECK-NEXT: R_{{.*}} Sz_bitcast_v8i1_to_i8 |
| 163 | 161 |
| 164 ; OPTM1-LABEL: test_bitcast_v8i1_to_i8: | 162 ; OPTM1-LABEL: test_bitcast_v8i1_to_i8 |
| 165 ; OPMT1: call -4 | 163 ; OPMT1: call -4 |
| 166 } | 164 } |
| 167 | 165 |
| 168 define i16 @test_bitcast_v16i1_to_i16(<16 x i1> %arg) { | 166 define i16 @test_bitcast_v16i1_to_i16(<16 x i1> %arg) { |
| 169 entry: | 167 entry: |
| 170 %res = bitcast <16 x i1> %arg to i16 | 168 %res = bitcast <16 x i1> %arg to i16 |
| 171 ret i16 %res | 169 ret i16 %res |
| 172 | 170 |
| 173 ; CHECK-LABEL: test_bitcast_v16i1_to_i16: | 171 ; CHECK-LABEL: test_bitcast_v16i1_to_i16 |
| 174 ; CHECK: call Sz_bitcast_v16i1_to_i16 | 172 ; CHECK: call |
| 173 ; CHECK-NEXT: R_{{.*}} Sz_bitcast_v16i1_to_i16 |
| 175 | 174 |
| 176 ; OPTM1-LABEL: test_bitcast_v16i1_to_i16: | 175 ; OPTM1-LABEL: test_bitcast_v16i1_to_i16 |
| 177 ; OPMT1: call -4 | 176 ; OPMT1: call -4 |
| 178 } | 177 } |
| 179 | 178 |
| 180 define <8 x i1> @test_bitcast_i8_to_v8i1(i32 %arg) { | 179 define <8 x i1> @test_bitcast_i8_to_v8i1(i32 %arg) { |
| 181 entry: | 180 entry: |
| 182 %arg.trunc = trunc i32 %arg to i8 | 181 %arg.trunc = trunc i32 %arg to i8 |
| 183 %res = bitcast i8 %arg.trunc to <8 x i1> | 182 %res = bitcast i8 %arg.trunc to <8 x i1> |
| 184 ret <8 x i1> %res | 183 ret <8 x i1> %res |
| 185 | 184 |
| 186 ; CHECK-LABEL: test_bitcast_i8_to_v8i1: | 185 ; CHECK-LABEL: test_bitcast_i8_to_v8i1 |
| 187 ; CHECK: call Sz_bitcast_i8_to_v8i1 | 186 ; CHECK: call |
| 187 ; CHECK-NEXT: R_{{.*}} Sz_bitcast_i8_to_v8i1 |
| 188 | 188 |
| 189 ; OPTM1-LABEL: test_bitcast_i8_to_v8i1: | 189 ; OPTM1-LABEL: test_bitcast_i8_to_v8i1 |
| 190 ; OPTM1: call Sz_bitcast_i8_to_v8i1 | 190 ; OPTM1: call Sz_bitcast_i8_to_v8i1 |
| 191 } | 191 } |
| 192 | 192 |
| 193 define <16 x i1> @test_bitcast_i16_to_v16i1(i32 %arg) { | 193 define <16 x i1> @test_bitcast_i16_to_v16i1(i32 %arg) { |
| 194 entry: | 194 entry: |
| 195 %arg.trunc = trunc i32 %arg to i16 | 195 %arg.trunc = trunc i32 %arg to i16 |
| 196 %res = bitcast i16 %arg.trunc to <16 x i1> | 196 %res = bitcast i16 %arg.trunc to <16 x i1> |
| 197 ret <16 x i1> %res | 197 ret <16 x i1> %res |
| 198 | 198 |
| 199 ; CHECK-LABEL: test_bitcast_i16_to_v16i1: | 199 ; CHECK-LABEL: test_bitcast_i16_to_v16i1 |
| 200 ; CHECK: call Sz_bitcast_i16_to_v16i1 | 200 ; CHECK: call |
| 201 ; CHECK-NEXT: R_{{.*}} Sz_bitcast_i16_to_v16i1 |
| 201 | 202 |
| 202 ; OPTM1-LABEL: test_bitcast_i16_to_v16i1: | 203 ; OPTM1-LABEL: test_bitcast_i16_to_v16i1 |
| 203 ; OPTM1: call Sz_bitcast_i16_to_v16i1 | 204 ; OPTM1: call Sz_bitcast_i16_to_v16i1 |
| 204 } | 205 } |
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