tests_lit/llvm2ice_tests/shift.ll - Issue 914263005: Subzero: switch from llvm-objdump to objdump for lit tests (for LLVM merge)

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Issue 914263005: Subzero: switch from llvm-objdump to objdump for lit tests (for LLVM merge) (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: Created 5 years, 10 months ago

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« tests_lit/llvm2ice_tests/nacl-atomic-cmpxchg-optimization.ll ('K') | « tests_lit/llvm2ice_tests/select-opt.ll ('k') | tests_lit/llvm2ice_tests/simple-loop.ll » ('j') | tests_lit/llvm2ice_tests/vector-arith.ll » ('J')
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1 ; This is a test of C-level conversion operations that clang lowers	1 ; This is a test of C-level conversion operations that clang lowers

2 ; into pairs of shifts.	2 ; into pairs of shifts.

3	3

4 ; RUN: %p2i -i %s --no-local-syms --args -O2 --verbose none \	4 ; RUN: %p2i -i %s --assemble --disassemble --no-local-syms --args -O2 --verbose \

5 ; RUN: \| llvm-mc -triple=i686-none-nacl -filetype=obj \	5 ; RUN: none \

6 ; RUN: \| llvm-objdump -d --symbolize -x86-asm-syntax=intel - \| FileCheck %s	6 ; RUN: \| FileCheck %s

7 ; RUN: %p2i -i %s --no-local-syms --args -Om1 --verbose none \	7 ; RUN: %p2i -i %s --assemble --disassemble --no-local-syms --args -Om1 --verbose \

8 ; RUN: \| llvm-mc -triple=i686-none-nacl -filetype=obj \	8 ; RUN: none \

9 ; RUN: \| llvm-objdump -d --symbolize -x86-asm-syntax=intel - \| FileCheck %s	9 ; RUN: \| FileCheck %s

10	10

11 @i1 = internal global [4 x i8] zeroinitializer, align 4	11 @i1 = internal global [4 x i8] zeroinitializer, align 4

12 @i2 = internal global [4 x i8] zeroinitializer, align 4	12 @i2 = internal global [4 x i8] zeroinitializer, align 4

13 @u1 = internal global [4 x i8] zeroinitializer, align 4	13 @u1 = internal global [4 x i8] zeroinitializer, align 4

14	14

15 define void @conv1() {	15 define void @conv1() {

16 entry:	16 entry:

17 %__0 = bitcast [4 x i8]* @u1 to i32*	17 %__0 = bitcast [4 x i8]* @u1 to i32*

18 %v0 = load i32* %__0, align 1	18 %v0 = load i32* %__0, align 1

19 %sext = shl i32 %v0, 24	19 %sext = shl i32 %v0, 24

(...skipping 12 matching lines...) Expand all Loading...
32 %v0 = load i32* %__0, align 1	32 %v0 = load i32* %__0, align 1

33 %sext1 = shl i32 %v0, 16	33 %sext1 = shl i32 %v0, 16

34 %v1 = ashr i32 %sext1, 16	34 %v1 = ashr i32 %sext1, 16

35 %__4 = bitcast [4 x i8]* @i2 to i32*	35 %__4 = bitcast [4 x i8]* @i2 to i32*

36 store i32 %v1, i32* %__4, align 1	36 store i32 %v1, i32* %__4, align 1

37 ret void	37 ret void

38 }	38 }

39 ; CHECK-LABEL: conv2	39 ; CHECK-LABEL: conv2

40 ; CHECK: shl {{.*}}, 16	40 ; CHECK: shl {{.*}}, 16

41 ; CHECK: sar {{.*}}, 16	41 ; CHECK: sar {{.*}}, 16

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