| OLD | NEW |
| 1 ; This checks the correctness of the lowering code for the small | 1 ; This checks the correctness of the lowering code for the small |
| 2 ; integer variants of sdiv and srem. | 2 ; integer variants of sdiv and srem. |
| 3 | 3 |
| 4 ; RUN: %p2i -i %s --args -O2 --verbose none \ | 4 ; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \ |
| 5 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | 5 ; RUN: | FileCheck %s |
| 6 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s | 6 ; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \ |
| 7 ; RUN: %p2i -i %s --args -Om1 --verbose none \ | 7 ; RUN: | FileCheck %s |
| 8 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | |
| 9 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s | |
| 10 | 8 |
| 11 define i32 @sdiv_i8(i32 %a.i32, i32 %b.i32) { | 9 define i32 @sdiv_i8(i32 %a.i32, i32 %b.i32) { |
| 12 entry: | 10 entry: |
| 13 %a = trunc i32 %a.i32 to i8 | 11 %a = trunc i32 %a.i32 to i8 |
| 14 %b = trunc i32 %b.i32 to i8 | 12 %b = trunc i32 %b.i32 to i8 |
| 15 %res = sdiv i8 %a, %b | 13 %res = sdiv i8 %a, %b |
| 16 %res.i32 = zext i8 %res to i32 | 14 %res.i32 = zext i8 %res to i32 |
| 17 ret i32 %res.i32 | 15 ret i32 %res.i32 |
| 18 ; CHECK-LABEL: sdiv_i8: | 16 ; CHECK-LABEL: sdiv_i8 |
| 19 ; CHECK: cbw | 17 ; CHECK: cbw |
| 20 ; CHECK: idiv | 18 ; CHECK: idiv |
| 21 } | 19 } |
| 22 | 20 |
| 23 define i32 @sdiv_i16(i32 %a.i32, i32 %b.i32) { | 21 define i32 @sdiv_i16(i32 %a.i32, i32 %b.i32) { |
| 24 entry: | 22 entry: |
| 25 %a = trunc i32 %a.i32 to i16 | 23 %a = trunc i32 %a.i32 to i16 |
| 26 %b = trunc i32 %b.i32 to i16 | 24 %b = trunc i32 %b.i32 to i16 |
| 27 %res = sdiv i16 %a, %b | 25 %res = sdiv i16 %a, %b |
| 28 %res.i32 = zext i16 %res to i32 | 26 %res.i32 = zext i16 %res to i32 |
| 29 ret i32 %res.i32 | 27 ret i32 %res.i32 |
| 30 ; CHECK-LABEL: sdiv_i16: | 28 ; CHECK-LABEL: sdiv_i16 |
| 31 ; CHECK: cwd | 29 ; CHECK: cwd |
| 32 ; CHECK: idiv | 30 ; CHECK: idiv |
| 33 } | 31 } |
| 34 | 32 |
| 35 define i32 @sdiv_i32(i32 %a, i32 %b) { | 33 define i32 @sdiv_i32(i32 %a, i32 %b) { |
| 36 entry: | 34 entry: |
| 37 %res = sdiv i32 %a, %b | 35 %res = sdiv i32 %a, %b |
| 38 ret i32 %res | 36 ret i32 %res |
| 39 ; CHECK-LABEL: sdiv_i32: | 37 ; CHECK-LABEL: sdiv_i32 |
| 40 ; CHECK: cdq | 38 ; CHECK: cdq |
| 41 ; CHECK: idiv | 39 ; CHECK: idiv |
| 42 } | 40 } |
| 43 | 41 |
| 44 define i32 @srem_i8(i32 %a.i32, i32 %b.i32) { | 42 define i32 @srem_i8(i32 %a.i32, i32 %b.i32) { |
| 45 entry: | 43 entry: |
| 46 %a = trunc i32 %a.i32 to i8 | 44 %a = trunc i32 %a.i32 to i8 |
| 47 %b = trunc i32 %b.i32 to i8 | 45 %b = trunc i32 %b.i32 to i8 |
| 48 %res = srem i8 %a, %b | 46 %res = srem i8 %a, %b |
| 49 %res.i32 = zext i8 %res to i32 | 47 %res.i32 = zext i8 %res to i32 |
| 50 ret i32 %res.i32 | 48 ret i32 %res.i32 |
| 51 ; CHECK-LABEL: srem_i8: | 49 ; CHECK-LABEL: srem_i8 |
| 52 ; CHECK: cbw | 50 ; CHECK: cbw |
| 53 ; CHECK: idiv | 51 ; CHECK: idiv |
| 54 } | 52 } |
| 55 | 53 |
| 56 define i32 @srem_i16(i32 %a.i32, i32 %b.i32) { | 54 define i32 @srem_i16(i32 %a.i32, i32 %b.i32) { |
| 57 entry: | 55 entry: |
| 58 %a = trunc i32 %a.i32 to i16 | 56 %a = trunc i32 %a.i32 to i16 |
| 59 %b = trunc i32 %b.i32 to i16 | 57 %b = trunc i32 %b.i32 to i16 |
| 60 %res = srem i16 %a, %b | 58 %res = srem i16 %a, %b |
| 61 %res.i32 = zext i16 %res to i32 | 59 %res.i32 = zext i16 %res to i32 |
| 62 ret i32 %res.i32 | 60 ret i32 %res.i32 |
| 63 ; CHECK-LABEL: srem_i16: | 61 ; CHECK-LABEL: srem_i16 |
| 64 ; CHECK: cwd | 62 ; CHECK: cwd |
| 65 ; CHECK: idiv | 63 ; CHECK: idiv |
| 66 } | 64 } |
| 67 | 65 |
| 68 define i32 @srem_i32(i32 %a, i32 %b) { | 66 define i32 @srem_i32(i32 %a, i32 %b) { |
| 69 entry: | 67 entry: |
| 70 %res = srem i32 %a, %b | 68 %res = srem i32 %a, %b |
| 71 ret i32 %res | 69 ret i32 %res |
| 72 ; CHECK-LABEL: srem_i32: | 70 ; CHECK-LABEL: srem_i32 |
| 73 ; CHECK: cdq | 71 ; CHECK: cdq |
| 74 ; CHECK: idiv | 72 ; CHECK: idiv |
| 75 } | 73 } |
| OLD | NEW |